Exploit the fact that samples fit a single byte
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3c9ad982e6
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0d2c617d94
1 changed files with 10 additions and 13 deletions
23
src/main.c
23
src/main.c
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@ -20,15 +20,12 @@
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#define IRP_SM 0
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#define IRN_SM 1
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// Actually one less, but this is also for timing.
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#define SAMPLE_DEPTH 128
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#define NUM_SAMPLES_BITS 10
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#define NUM_SAMPLES (1 << NUM_SAMPLES_BITS)
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static uint16_t irp_buffer[NUM_SAMPLES] __aligned(2 * NUM_SAMPLES);
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static uint8_t irp_buffer[NUM_SAMPLES] __aligned(NUM_SAMPLES);
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static int dma_ch_irp_rx;
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static uint16_t irn_buffer[NUM_SAMPLES] __aligned(2 * NUM_SAMPLES);
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static uint8_t irn_buffer[NUM_SAMPLES] __aligned(NUM_SAMPLES);
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static int dma_ch_irn_rx;
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#define BIT(n) (1 << (n))
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@ -37,7 +34,7 @@ static void init_pio_sm(pio_hw_t *pio, int sm, int rx_pin, int fb_pin)
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{
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const uint16_t insn[] = {
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pio_encode_jmp_x_dec(4),
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pio_encode_in(pio_y, 16) | pio_encode_sideset_opt(1, 1),
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pio_encode_in(pio_y, 8) | pio_encode_sideset_opt(1, 1),
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pio_encode_mov(pio_x, pio_osr),
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pio_encode_set(pio_y, 0) | pio_encode_sideset_opt(1, 0),
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pio_encode_jmp_pin(6),
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@ -62,7 +59,7 @@ static void init_pio_sm(pio_hw_t *pio, int sm, int rx_pin, int fb_pin)
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sm_config_set_set_pins(&pc, fb_pin, 1);
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sm_config_set_sideset_pin_base(&pc, fb_pin);
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sm_config_set_sideset(&pc, 2, true, false);
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sm_config_set_in_shift(&pc, false, true, 16);
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sm_config_set_in_shift(&pc, false, true, 32);
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sm_config_set_out_shift(&pc, false, false, 32);
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pio_sm_init(pio, sm, prog.origin, &pc);
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@ -71,7 +68,7 @@ static void init_pio_sm(pio_hw_t *pio, int sm, int rx_pin, int fb_pin)
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pio_sm_restart(pio, sm);
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pio_sm_clear_fifos(pio, sm);
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pio->txf[sm] = SAMPLE_DEPTH - 2;
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pio->txf[sm] = 126;
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pio_sm_exec_wait_blocking(pio, sm, pio_encode_pull(false, false));
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pio_sm_exec_wait_blocking(pio, sm, pio_encode_mov(pio_x, pio_osr));
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@ -92,7 +89,7 @@ static unsigned tail;
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static bool read_sample(int *sample)
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{
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unsigned head = (dma_hw->ch[dma_ch_irn_rx].write_addr >> 1) % NUM_SAMPLES;
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unsigned head = dma_hw->ch[dma_ch_irn_rx].write_addr % NUM_SAMPLES;
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if (tail == head)
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return false;
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@ -138,19 +135,19 @@ int main()
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dma_channel_config dma_conf;
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dma_conf = dma_channel_get_default_config(dma_ch_irp_rx);
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channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_16);
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channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
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channel_config_set_read_increment(&dma_conf, false);
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channel_config_set_write_increment(&dma_conf, true);
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channel_config_set_ring(&dma_conf, true, NUM_SAMPLES_BITS + 1);
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channel_config_set_ring(&dma_conf, true, NUM_SAMPLES_BITS);
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channel_config_set_dreq(&dma_conf, pio_get_dreq(IR_PIO, IRP_SM, false));
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channel_config_set_chain_to(&dma_conf, dma_ch_irn_rx);
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dma_channel_configure(dma_ch_irp_rx, &dma_conf, irp_buffer, &IR_PIO->rxf[IRP_SM], 1, false);
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dma_conf = dma_channel_get_default_config(dma_ch_irn_rx);
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channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_16);
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channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
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channel_config_set_read_increment(&dma_conf, false);
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channel_config_set_write_increment(&dma_conf, true);
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channel_config_set_ring(&dma_conf, true, NUM_SAMPLES_BITS + 1);
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channel_config_set_ring(&dma_conf, true, NUM_SAMPLES_BITS);
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channel_config_set_dreq(&dma_conf, pio_get_dreq(IR_PIO, IRN_SM, false));
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channel_config_set_chain_to(&dma_conf, dma_ch_irp_rx);
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dma_channel_configure(dma_ch_irn_rx, &dma_conf, irn_buffer, &IR_PIO->rxf[IRN_SM], 1, false);
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