mordae/pico-sdr
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Use uint32_t freq

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Jan Hamal Dvořák 2025-07-03 16:12:24 +02:00
parent 2fdc334719
commit 1e4846dac3
1 changed files with 11 additions and 18 deletions
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29
src/main.c
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@ -16,7 +16,6 @@
#include <hardware/regs/clocks.h> #include <hardware/regs/clocks.h>
#include <hardware/structs/bus_ctrl.h> #include <hardware/structs/bus_ctrl.h>
#include <math.h>
#include <stdio.h> #include <stdio.h>
#include <limits.h> #include <limits.h>
#include <stdlib.h> #include <stdlib.h>
@ -225,7 +224,7 @@ static void init_adder()
origin_adder = pio_add_program(PIO, &prog); origin_adder = pio_add_program(PIO, &prog);
pio_sm_config pc = pio_get_default_sm_config(); pio_sm_config pc = pio_get_default_sm_config();
sm_config_set_wrap(&pc, origin_adder, origin_adder + 13); sm_config_set_wrap(&pc, origin_adder, origin_adder + 15);
sm_config_set_clkdiv_int_frac(&pc, 1, 0); sm_config_set_clkdiv_int_frac(&pc, 1, 0);
sm_config_set_in_shift(&pc, false, true, 32); sm_config_set_in_shift(&pc, false, true, 32);
sm_config_set_out_shift(&pc, false, true, 32); sm_config_set_out_shift(&pc, false, true, 32);
@ -234,13 +233,11 @@ static void init_adder()
pio_sm_init(PIO, SM_SIN, origin_adder, &pc); pio_sm_init(PIO, SM_SIN, origin_adder, &pc);
} }
#define STEP_BASE ((UINT_MAX + 1.0) / CLK_SYS_HZ)
static void lo_generate_phase(uint32_t *buf, size_t len, uint32_t step, uint32_t phase) static void lo_generate_phase(uint32_t *buf, size_t len, uint32_t step, uint32_t phase)
{ {
for (size_t i = 0; i < len; i++) { uint32_t bits = 0;
uint32_t bits = 0;
for (size_t i = 0; i < len; i++) {
for (int j = 0; j < 32; j++) { for (int j = 0; j < 32; j++) {
bits <<= 1; bits <<= 1;
bits |= phase >> 31; bits |= phase >> 31;
@ -251,16 +248,12 @@ static void lo_generate_phase(uint32_t *buf, size_t len, uint32_t step, uint32_t
} }
} }
static void rx_lo_init(double req_freq, bool align) static void rx_lo_init(uint32_t freq)
{ {
const double step_hz = (double)CLK_SYS_HZ / ((8 << LO_BITS_DEPTH) / 2.0); const uint32_t frac = (8 + 16llu * CLK_SYS_HZ / (8 << LO_BITS_DEPTH)) >> 4;
double freq = req_freq; uint32_t step = ((uint64_t)freq << 32) / (uint64_t)CLK_SYS_HZ;
step /= frac;
if (align) step *= frac;
freq = round(freq / step_hz) * step_hz;
uint32_t step = STEP_BASE * freq;
lo_generate_phase(lo_cos, LO_WORDS, step, COS_PHASE); lo_generate_phase(lo_cos, LO_WORDS, step, COS_PHASE);
lo_generate_phase(lo_sin, LO_WORDS, step, SIN_PHASE); lo_generate_phase(lo_sin, LO_WORDS, step, SIN_PHASE);
} }
@ -535,13 +528,13 @@ static void run_command(uint8_t cmd, uint32_t arg)
if (0x01 == cmd) { if (0x01 == cmd) {
/* Tune to a new center frequency */ /* Tune to a new center frequency */
frequency = arg; frequency = arg;
rx_lo_init(frequency + sample_rate, true); rx_lo_init(frequency + sample_rate);
} else if (0x02 == cmd) { } else if (0x02 == cmd) {
/* Set the rate at which IQ sample pairs are sent */ /* Set the rate at which IQ sample pairs are sent */
sample_rate = arg; sample_rate = arg;
gain = BASE_GAIN / (CLK_SYS_HZ / sample_rate / 2); gain = BASE_GAIN / (CLK_SYS_HZ / sample_rate / 2);
dma_timer_set_fraction(dma_t_samp, 1, CLK_SYS_HZ / (sample_rate * DECIMATE)); dma_timer_set_fraction(dma_t_samp, 1, CLK_SYS_HZ / (sample_rate * DECIMATE));
rx_lo_init(frequency + sample_rate, true); rx_lo_init(frequency + sample_rate);
} }
} }
@ -632,7 +625,7 @@ int main()
queue_init(&iq_queue, sizeof(uint8_t *), IQ_QUEUE_LEN); queue_init(&iq_queue, sizeof(uint8_t *), IQ_QUEUE_LEN);
rx_lo_init(frequency + sample_rate, true); rx_lo_init(frequency + sample_rate);
/* We need to have the sampling timer ready. */ /* We need to have the sampling timer ready. */
dma_t_samp = dma_claim_unused_timer(true); dma_t_samp = dma_claim_unused_timer(true);