Use integer multiple of the XOSC for CLK_SYS
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@ -52,7 +52,7 @@
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/* Digital Data */
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#if 0
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#define VREG_VOLTAGE VREG_VOLTAGE_DEFAULT
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#define CLK_SYS_HZ (250 * MHZ)
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#define CLK_SYS_HZ (252 * MHZ)
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#define BANDWIDTH 1280000
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#define DECIMATION_BITS 6
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#define LPF_ORDER 4
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