Dither LO phase to reduce artifacts
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parent
ff6001b0da
commit
56aff439f7
46
src/main.c
46
src/main.c
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@ -83,6 +83,14 @@ static queue_t iq_queue;
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static uint8_t iq_queue_buffer[IQ_QUEUE_LEN][IQ_BLOCK_LEN];
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static size_t iq_queue_pos = 0;
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static uint32_t rnd = 0;
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inline static uint32_t rnd_next()
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{
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rnd = rnd * 0x41c64e6d + 12345;
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return rnd;
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}
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static void bias_set_delay(int delay)
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{
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delay += 200;
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@ -236,25 +244,50 @@ static void adder_init()
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pio_sm_set_enabled(pio1, 3, true);
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}
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#define STEP_BASE ((UINT_MAX + 1.0) / CLK_SYS_HZ)
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static uint32_t freq_step = 1;
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static void lo_generate(uint32_t *buf, double freq, uint32_t phase)
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{
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static const double base = (UINT_MAX + 1.0) / CLK_SYS_HZ;
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freq_step = STEP_BASE * freq;
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uint32_t step = base * freq;
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unsigned down = 4 + __builtin_clz(freq_step);
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for (size_t i = 0; i < LO_WORDS; i++) {
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unsigned bits = 0;
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uint32_t bits = 0;
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int shift = (rnd_next() >> down) - (rnd_next() >> down) + (rnd_next() >> down) -
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(rnd_next() >> down);
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for (int j = 0; j < 32; j++) {
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bits |= phase >> 31;
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bits |= (phase + shift) >> 31;
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bits <<= 1;
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phase += step;
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phase += freq_step;
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}
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buf[i] = bits;
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}
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}
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static void lo_tweak(uint32_t *buf, uint32_t phase)
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{
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static size_t i = 0;
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uint32_t bits = 0;
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unsigned down = 4 + __builtin_clz(freq_step);
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phase += freq_step * i * 32;
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for (int j = 0; j < 32; j++) {
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int shift = (rnd_next() >> down) - (rnd_next() >> down) + (rnd_next() >> down) -
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(rnd_next() >> down);
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bits |= (phase + shift) >> 31;
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bits <<= 1;
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phase += freq_step;
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}
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buf[i] = bits;
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i = (i + 1) & (LO_WORDS - 1);
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}
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static void rx_lo_init(double req_freq, bool align)
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{
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const double step_hz = (double)CLK_SYS_HZ / (4 << LO_BITS_DEPTH);
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@ -568,6 +601,9 @@ static void rf_rx(void)
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if (queue_try_add(&iq_queue, &block)) {
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iq_queue_pos = (iq_queue_pos + 1) & (IQ_QUEUE_LEN - 1);
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}
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lo_tweak(lo_cos, COS_PHASE);
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lo_tweak(lo_sin, SIN_PHASE);
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}
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}
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