Update 40.68 MHz settings
This commit is contained in:
parent
d8395922da
commit
9519be4e76
2 changed files with 15 additions and 14 deletions
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@ -77,18 +77,19 @@ blocks:
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bus_sink: false
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bus_sink: false
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bus_source: false
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bus_source: false
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bus_structure: null
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bus_structure: null
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coordinate: [712, 496.0]
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coordinate: [704, 496.0]
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rotation: 0
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rotation: 0
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state: true
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state: true
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- name: blocks_interleaved_char_to_complex_0
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- name: blocks_interleaved_short_to_complex_0
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id: blocks_interleaved_char_to_complex
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id: blocks_interleaved_short_to_complex
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parameters:
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parameters:
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affinity: ''
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affinity: ''
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alias: ''
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alias: ''
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comment: ''
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comment: ''
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maxoutbuf: '0'
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maxoutbuf: '0'
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minoutbuf: '0'
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minoutbuf: '0'
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scale_factor: '127'
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scale_factor: (1 << 15) - 1
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swap: 'False'
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vector_input: 'False'
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vector_input: 'False'
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states:
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states:
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bus_sink: false
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bus_sink: false
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@ -172,7 +173,7 @@ blocks:
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minoutbuf: '0'
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minoutbuf: '0'
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port: '1234'
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port: '1234'
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server: 'True'
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server: 'True'
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type: byte
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type: short
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vlen: '1'
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vlen: '1'
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states:
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states:
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bus_sink: false
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bus_sink: false
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@ -598,7 +599,7 @@ blocks:
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grid: 'True'
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grid: 'True'
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gui_hint: (0, 0, 1, 2)
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gui_hint: (0, 0, 1, 2)
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int_max: '0'
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int_max: '0'
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int_min: '-90'
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int_min: 10 * math.log10(1 / ((2 ** 15 - 1) ** 2))
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label1: ''
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label1: ''
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label10: ''
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label10: ''
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label2: ''
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label2: ''
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@ -628,15 +629,15 @@ blocks:
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connections:
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connections:
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- [analog_quadrature_demod_cf_0, '0', qtgui_time_sink_x_0_0, '0']
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- [analog_quadrature_demod_cf_0, '0', qtgui_time_sink_x_0_0, '0']
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- [blocks_interleaved_char_to_complex_0, '0', analog_quadrature_demod_cf_0, '0']
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- [blocks_interleaved_short_to_complex_0, '0', analog_quadrature_demod_cf_0, '0']
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- [blocks_interleaved_char_to_complex_0, '0', blocks_probe_rate_0, '0']
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- [blocks_interleaved_short_to_complex_0, '0', blocks_probe_rate_0, '0']
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- [blocks_interleaved_char_to_complex_0, '0', digital_costas_loop_cc_0, '0']
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- [blocks_interleaved_short_to_complex_0, '0', digital_costas_loop_cc_0, '0']
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- [blocks_interleaved_char_to_complex_0, '0', qtgui_time_sink_x_0, '0']
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- [blocks_interleaved_short_to_complex_0, '0', qtgui_time_sink_x_0, '0']
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- [blocks_interleaved_char_to_complex_0, '0', qtgui_waterfall_sink_x_0_0, '0']
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- [blocks_interleaved_short_to_complex_0, '0', qtgui_waterfall_sink_x_0_0, '0']
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- [blocks_probe_rate_0, rate, blocks_message_debug_0, print]
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- [blocks_probe_rate_0, rate, blocks_message_debug_0, print]
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- [digital_costas_loop_cc_0, '0', qtgui_const_sink_x_0, '0']
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- [digital_costas_loop_cc_0, '0', qtgui_const_sink_x_0, '0']
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- [digital_costas_loop_cc_0, '0', qtgui_time_sink_x_0_1, '0']
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- [digital_costas_loop_cc_0, '0', qtgui_time_sink_x_0_1, '0']
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- [network_tcp_source_0, '0', blocks_interleaved_char_to_complex_0, '0']
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- [network_tcp_source_0, '0', blocks_interleaved_short_to_complex_0, '0']
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metadata:
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metadata:
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file_format: 1
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file_format: 1
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@ -54,9 +54,9 @@
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#define CLK_SYS_HZ (250 * MHZ)
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#define CLK_SYS_HZ (250 * MHZ)
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#define BANDWIDTH 1280000
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#define BANDWIDTH 1280000
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#define DECIMATION_BITS 6
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#define DECIMATION_BITS 6
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#define LPF_ORDER 3
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#define LPF_ORDER 4
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#define AGC_DECAY_BITS 16
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#define AGC_DECAY_BITS 16
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#define BIAS_STRENGTH 5
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#define BIAS_STRENGTH 3
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#endif
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#endif
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#define IQ_BLOCK_LEN 32
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#define IQ_BLOCK_LEN 32
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