From 9648c344bfd8e042cdaff1fb97b1f9da69ffede2 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Jan=20Hamal=20Dvo=C5=99=C3=A1k?= <mordae@anilinux.org>
Date: Fri, 7 Jun 2024 10:00:10 +0200
Subject: [PATCH] util/bridge: drain leftover samples
This prevents sending leftover samples to the client instead of the
RTL0 header required for it to properly control gain.
---
util/bridge.py | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/util/bridge.py b/util/bridge.py
index f334d16..80dbe7a 100755
--- a/util/bridge.py
+++ b/util/bridge.py
@@ -50,7 +50,13 @@ def bridge(frequency):
with serial.Serial("/dev/ttyACM0", baudrate=10_000_000, timeout=0.1) as fp:
print(f"Starting RX @ {frequency}")
- fp.write(struct.pack(">BBL", 0, 1, int(frequency)))
+
+ # Remove any leftovers.
+ while fp.read(64):
+ fp.write(b"\x00")
+ fp.flush()
+
+ fp.write(struct.pack(">BL", 1, int(frequency)))
fp.flush()
print("Begin")
@@ -82,6 +88,7 @@ def bridge(frequency):
finally:
fp.write(b"\x00")
+ fp.flush()
print("Bye.")