diff --git a/grc/PicoSDR-WBFM.grc b/grc/PicoSDR-WBFM.grc index 7f2a5c0..c9d33cc 100644 --- a/grc/PicoSDR-WBFM.grc +++ b/grc/PicoSDR-WBFM.grc @@ -37,7 +37,7 @@ blocks: id: variable parameters: comment: '' - value: '88_200_000' + value: '94_600_000' states: bus_sink: false bus_source: false @@ -374,7 +374,7 @@ blocks: freq7: 100e6 freq8: 100e6 freq9: 100e6 - gain0: '30' + gain0: '0' gain1: '10' gain10: '10' gain11: '10' diff --git a/grc/PicoSDR.grc b/grc/PicoSDR.grc index 9a9fca4..70ffba7 100644 --- a/grc/PicoSDR.grc +++ b/grc/PicoSDR.grc @@ -401,7 +401,7 @@ blocks: freq7: 100e6 freq8: 100e6 freq9: 100e6 - gain0: '30' + gain0: '0' gain1: '10' gain10: '10' gain11: '10' diff --git a/src/main.c b/src/main.c index 95380b9..a418364 100644 --- a/src/main.c +++ b/src/main.c @@ -22,43 +22,67 @@ #include #define VREG_VOLTAGE VREG_VOLTAGE_1_20 -#define CLK_SYS_HZ (300 * MHZ) +#define CLK_SYS_HZ (306 * MHZ) + +#define RX_PIN 10 +#define FB_PIN 11 #define PSU_PIN 23 +#define PIO pio0 +#define SM_RX 0 +#define SM_BIAS 1 +#define SM_COS 2 +#define SM_SIN 3 + #define IQ_SAMPLES 32 #define IQ_BLOCK_LEN (2 * IQ_SAMPLES) -#define IQ_QUEUE_LEN 4 +#define IQ_QUEUE_LEN 8 #define XOR_ADDR 0x1000 -#define LO_COS_ACCUMULATOR (&pio1->sm[2].pinctrl) -#define LO_SIN_ACCUMULATOR (&pio1->sm[3].pinctrl) - #define LO_BITS_DEPTH 15 #define LO_WORDS (1 << (LO_BITS_DEPTH - 2)) +#define LO_COS_ACCUMULATOR (&PIO->sm[SM_COS].pinctrl) +#define LO_SIN_ACCUMULATOR (&PIO->sm[SM_SIN].pinctrl) +#define SIN_PHASE (0u) +#define COS_PHASE (3u << 30) + static uint32_t lo_cos[LO_WORDS] __attribute__((__aligned__(1 << LO_BITS_DEPTH))); static uint32_t lo_sin[LO_WORDS] __attribute__((__aligned__(1 << LO_BITS_DEPTH))); #define DECIMATE 4 -#define RX_STRIDE (2 * IQ_SAMPLES * DECIMATE) -#define RX_BITS_DEPTH 13 -#define RX_WORDS (1 << (RX_BITS_DEPTH - 2)) - -static_assert(RX_STRIDE * 4 < RX_WORDS, "RX_STRIDE * 4 < RX_WORDS"); - -static uint32_t rx_cos[RX_WORDS] __attribute__((__aligned__(1 << RX_BITS_DEPTH))); -static uint32_t rx_sin[RX_WORDS] __attribute__((__aligned__(1 << RX_BITS_DEPTH))); #define INIT_SAMPLE_RATE 100000 #define INIT_FREQ 94600000 +#define INIT_GAIN 127 #define NUM_GAINS 29 static int gains[NUM_GAINS] = { 0, 9, 14, 27, 37, 77, 87, 125, 144, 157, 166, 197, 207, 229, 254, 280, 297, 328, 338, 364, 372, 386, 402, 421, 434, 439, 445, 480, 496 }; static int sample_rate = INIT_SAMPLE_RATE; +static int max_amplitude = CLK_SYS_HZ / INIT_SAMPLE_RATE / 2; +static int gain = INIT_GAIN; +static int frequency = INIT_FREQ; -#define SIN_PHASE (0u) -#define COS_PHASE (3u << 30) +static queue_t iq_queue; +static uint8_t iq_queue_buffer[IQ_QUEUE_LEN][IQ_BLOCK_LEN]; +static size_t iq_queue_pos = 0; + +static uint32_t rnd = 0; + +inline static __unused uint32_t rnd_next() +{ + rnd = rnd * 0x41c64e6d + 12345; + return rnd; +} + +static void dma_channel_clear_chain_to(int ch) +{ + uint32_t ctrl = dma_hw->ch[ch].al1_ctrl; + ctrl &= ~DMA_CH0_CTRL_TRIG_CHAIN_TO_BITS; + ctrl |= ch << DMA_CH0_CTRL_TRIG_CHAIN_TO_LSB; + dma_hw->ch[ch].al1_ctrl = ctrl; +} /* rx -> cp -> cos -> sin -> pio_cos -> pio_sin -> rx ... */ static int dma_ch_rx = -1; @@ -68,235 +92,182 @@ static int dma_ch_sin = -1; static int dma_ch_pio_cos = -1; static int dma_ch_pio_sin = -1; -static int dma_ch_samp_trig = -1; static int dma_ch_samp_cos = -1; static int dma_ch_samp_sin = -1; static int dma_t_samp = -1; -static int dma_ch_in_cos = -1; -static int dma_ch_in_sin = -1; +static int origin_rx = -1; +static int origin_bias = -1; +static int origin_adder = 0; -static queue_t iq_queue; -static uint8_t iq_queue_buffer[IQ_QUEUE_LEN][IQ_BLOCK_LEN]; -static size_t iq_queue_pos = 0; - -static uint32_t rnd = 0; - -inline static uint32_t rnd_next() +static void init_rx() { - rnd = rnd * 0x41c64e6d + 12345; - return rnd; -} - -static void bias_set_gain(int gain) -{ - if (gain > 9) - gain = 9; - else if (gain < 0) - gain = 0; - - pio1->sm[0].execctrl = (pio1->sm[0].execctrl & ~PIO_SM0_EXECCTRL_WRAP_BOTTOM_BITS) | - ((19 - gain) << PIO_SM0_EXECCTRL_WRAP_BOTTOM_LSB); -} - -static void bias_init(int in_pin, int out_pin) -{ - gpio_disable_pulls(in_pin); - gpio_disable_pulls(out_pin); - - pio_gpio_init(pio1, out_pin); - - gpio_set_input_hysteresis_enabled(in_pin, false); - gpio_set_drive_strength(out_pin, GPIO_DRIVE_STRENGTH_2MA); - gpio_set_slew_rate(out_pin, GPIO_SLEW_RATE_SLOW); + gpio_disable_pulls(RX_PIN); + pio_gpio_init(PIO, RX_PIN); const uint16_t insn[] = { - pio_encode_in(pio_pins, 1), - pio_encode_in(pio_pins, 1), - pio_encode_in(pio_pins, 1), - pio_encode_in(pio_pins, 1), - pio_encode_in(pio_pins, 1), - pio_encode_in(pio_pins, 1), - pio_encode_in(pio_pins, 1), - pio_encode_in(pio_pins, 1), - pio_encode_in(pio_pins, 1), + pio_encode_in(pio_pins, 1) | pio_encode_delay(0), + }; - pio_encode_mov(pio_x, pio_isr), + pio_program_t prog = { + .instructions = insn, + .length = sizeof(insn) / sizeof(*insn), + .origin = origin_rx, + }; + + if (pio_can_add_program(PIO, &prog)) + origin_rx = pio_add_program(PIO, &prog); + + pio_sm_config pc = pio_get_default_sm_config(); + sm_config_set_in_pins(&pc, RX_PIN); + sm_config_set_wrap(&pc, origin_rx, origin_rx + prog.length - 1); + sm_config_set_clkdiv_int_frac(&pc, 1, 0); + sm_config_set_fifo_join(&pc, PIO_FIFO_JOIN_RX); + sm_config_set_in_shift(&pc, false, true, 32); + pio_sm_init(PIO, SM_RX, origin_rx, &pc); + + pio_sm_set_consecutive_pindirs(PIO, SM_RX, RX_PIN, 1, GPIO_IN); +} + +static void init_bias() +{ + gpio_disable_pulls(RX_PIN); + gpio_disable_pulls(FB_PIN); + + pio_gpio_init(PIO, FB_PIN); + + gpio_set_input_hysteresis_enabled(RX_PIN, false); + gpio_set_drive_strength(FB_PIN, GPIO_DRIVE_STRENGTH_2MA); + gpio_set_slew_rate(FB_PIN, GPIO_SLEW_RATE_SLOW); + + PIO->input_sync_bypass = 1u << RX_PIN; + + const uint16_t insn[] = { pio_encode_mov(pio_isr, pio_null), + pio_encode_in(pio_y, 4), + pio_encode_in(pio_pins, 1) | pio_encode_delay(15), + pio_encode_in(pio_pins, 1) | pio_encode_delay(15), - pio_encode_jmp_x_dec(11), + pio_encode_mov(pio_y, pio_isr), + pio_encode_mov(pio_x, pio_isr), + + pio_encode_jmp_x_dec(6), pio_encode_mov_not(pio_pins, pio_pins) | pio_encode_sideset(1, 1), }; pio_program_t prog = { .instructions = insn, .length = sizeof(insn) / sizeof(*insn), - .origin = 10, + .origin = origin_bias, }; - pio_sm_set_enabled(pio1, 0, false); - pio_sm_restart(pio1, 0); - pio_sm_clear_fifos(pio1, 0); - - if (pio_can_add_program(pio1, &prog)) - pio_add_program(pio1, &prog); + if (pio_can_add_program(PIO, &prog)) + origin_bias = pio_add_program(PIO, &prog); pio_sm_config pc = pio_get_default_sm_config(); sm_config_set_in_shift(&pc, false, false, 32); sm_config_set_sideset(&pc, 1, false, true); - sm_config_set_sideset_pins(&pc, out_pin); - sm_config_set_in_pins(&pc, in_pin); - sm_config_set_out_pins(&pc, out_pin, 1); - sm_config_set_set_pins(&pc, out_pin, 1); + sm_config_set_sideset_pins(&pc, FB_PIN); + sm_config_set_in_pins(&pc, RX_PIN); + sm_config_set_out_pins(&pc, FB_PIN, 1); + sm_config_set_set_pins(&pc, RX_PIN, 1); - sm_config_set_wrap(&pc, prog.origin, prog.origin + prog.length - 1); + sm_config_set_wrap(&pc, origin_bias, origin_bias + prog.length - 1); sm_config_set_clkdiv_int_frac(&pc, 1, 0); - pio_sm_init(pio1, 0, prog.origin, &pc); + pio_sm_init(PIO, SM_BIAS, origin_bias, &pc); - pio_sm_set_consecutive_pindirs(pio1, 0, out_pin, 1, GPIO_OUT); - - pio_sm_set_enabled(pio1, 0, true); + pio_sm_exec_wait_blocking(PIO, SM_BIAS, pio_encode_set(pio_y, 31)); + pio_sm_set_consecutive_pindirs(PIO, SM_BIAS, FB_PIN, 1, GPIO_OUT); } -static void watch_init(int in_pin) +static const uint32_t samp_insn = 16; + +static void init_adder() { const uint16_t insn[] = { - pio_encode_in(pio_pins, 1), - }; + pio_encode_out(pio_pc, 4), // 0000 +0 + pio_encode_jmp_x_dec(0), // 0001 +1 + pio_encode_jmp_x_dec(0), // 0010 +1 + pio_encode_jmp_y_dec(0), // 0011 +2 + pio_encode_jmp_x_dec(0), // 0100 +1 + pio_encode_jmp_y_dec(0), // 0101 +2 + pio_encode_jmp_y_dec(0), // 0110 +2 + pio_encode_jmp_y_dec(1), // 0111 +2 +1 + pio_encode_jmp_x_dec(0), // 1000 +1 + pio_encode_jmp_y_dec(0), // 1001 +2 + pio_encode_jmp_y_dec(0), // 1010 +2 + pio_encode_jmp_y_dec(1), // 1011 +2 +1 + pio_encode_jmp_y_dec(0), // 1100 +2 + pio_encode_jmp_y_dec(1), // 1101 +2 +1 + pio_encode_jmp_y_dec(1), // 1110 +2 +1 + pio_encode_jmp_y_dec(3), // 1111 +2 +2 - pio_program_t prog = { - .instructions = insn, - .length = 1, - .origin = 6, - }; - - pio_sm_set_enabled(pio1, 1, false); - pio_sm_restart(pio1, 1); - pio_sm_clear_fifos(pio1, 1); - - if (pio_can_add_program(pio1, &prog)) - pio_add_program(pio1, &prog); - - pio_sm_config pc = pio_get_default_sm_config(); - sm_config_set_in_pins(&pc, in_pin); - sm_config_set_wrap(&pc, prog.origin, prog.origin + prog.length - 1); - sm_config_set_clkdiv_int_frac(&pc, 1, 0); - sm_config_set_fifo_join(&pc, PIO_FIFO_JOIN_RX); - sm_config_set_in_shift(&pc, false, true, 32); - pio_sm_init(pio1, 1, prog.origin, &pc); - - pio_sm_set_enabled(pio1, 1, true); -} - -static void adder_init() -{ - const uint16_t insn[] = { - pio_encode_jmp_y_dec(1), - pio_encode_out(pio_pc, 2), - pio_encode_out(pio_pc, 2), - pio_encode_jmp_x_dec(2), - - /* Avoid Y-- on wrap. */ - pio_encode_out(pio_pc, 2), + /* + * Should wrap here. + * Jump to this portion must be inserted from the outside. + */ + pio_encode_in(pio_y, 32), + pio_encode_in(pio_x, 32), + pio_encode_set(pio_y, 0), + pio_encode_set(pio_x, 0), + //pio_encode_jmp_y_dec(21), + //pio_encode_jmp_x_dec(22), + pio_encode_out(pio_pc, 4), }; pio_program_t prog = { .instructions = insn, .length = sizeof(insn) / sizeof(*insn), - .origin = 0, + .origin = origin_adder, }; - pio_sm_set_enabled(pio1, 2, false); - pio_sm_set_enabled(pio1, 3, false); - - pio_sm_restart(pio1, 2); - pio_sm_restart(pio1, 3); - - pio_sm_clear_fifos(pio1, 2); - pio_sm_clear_fifos(pio1, 3); - - if (pio_can_add_program(pio1, &prog)) - pio_add_program(pio1, &prog); + if (pio_can_add_program(PIO, &prog)) + origin_adder = pio_add_program(PIO, &prog); pio_sm_config pc = pio_get_default_sm_config(); - sm_config_set_wrap(&pc, prog.origin, prog.origin + prog.length - 1); + sm_config_set_wrap(&pc, origin_adder, origin_adder + 15); sm_config_set_clkdiv_int_frac(&pc, 1, 0); sm_config_set_in_shift(&pc, false, true, 32); sm_config_set_out_shift(&pc, false, true, 32); - pio_sm_init(pio1, 2, prog.origin + prog.length - 1, &pc); - pio_sm_init(pio1, 3, prog.origin + prog.length - 1, &pc); - pio_sm_set_enabled(pio1, 2, true); - pio_sm_set_enabled(pio1, 3, true); + pio_sm_init(PIO, SM_COS, origin_adder, &pc); + pio_sm_init(PIO, SM_SIN, origin_adder, &pc); } #define STEP_BASE ((UINT_MAX + 1.0) / CLK_SYS_HZ) -static uint32_t freq_step = 1; -static void lo_generate(uint32_t *buf, double freq, uint32_t phase) +static void lo_generate_phase(uint32_t *buf, size_t len, uint32_t step, uint32_t phase) { - freq_step = STEP_BASE * freq; - - unsigned down = 2 + __builtin_clz(freq_step); - - for (size_t i = 0; i < LO_WORDS; i++) { + for (size_t i = 0; i < len; i++) { uint32_t bits = 0; - int shift = (rnd_next() >> down) - (rnd_next() >> down); for (int j = 0; j < 32; j++) { - bits |= (phase + shift) >> 31; + bits |= phase >> 31; bits <<= 1; - phase += freq_step; + phase += step; } buf[i] = bits; } } -static void lo_tweak(uint32_t *buf, uint32_t phase) -{ - static size_t i = 0; - uint32_t bits = 0; - unsigned down = 2 + __builtin_clz(freq_step); - - phase += freq_step * i * 32; - - for (int j = 0; j < 32; j++) { - int shift = (rnd_next() >> down) - (rnd_next() >> down); - bits |= (phase + shift) >> 31; - bits <<= 1; - phase += freq_step; - } - - buf[i] = bits; - i = (i + 1) & (LO_WORDS - 1); -} - static void rx_lo_init(double req_freq, bool align) { - const double step_hz = (double)CLK_SYS_HZ / (8 << LO_BITS_DEPTH); + const double step_hz = (double)CLK_SYS_HZ / ((32 << LO_BITS_DEPTH) / 2.0); double freq = req_freq; if (align) freq = round(freq / step_hz) * step_hz; - lo_generate(lo_cos, freq, COS_PHASE); - lo_generate(lo_sin, freq, SIN_PHASE); + uint32_t step = STEP_BASE * freq; + + lo_generate_phase(lo_cos, LO_WORDS, step, COS_PHASE); + lo_generate_phase(lo_sin, LO_WORDS, step, SIN_PHASE); } -static const uint32_t samp_insn[4] __attribute__((__aligned__(16))); -static const uint32_t samp_insn[4] = { - 0x4040, /* IN Y, 32 */ - 0x4020, /* IN X, 32 */ - 0xe040, /* SET Y, 0 */ - 0xe020, /* SET X, 0 */ -}; - -static uint32_t null, one = 1; - -static void rf_rx_start(int rx_pin, int bias_pin) +static void rf_rx_start() { dma_ch_rx = dma_claim_unused_channel(true); dma_ch_cp = dma_claim_unused_channel(true); @@ -307,9 +278,6 @@ static void rf_rx_start(int rx_pin, int bias_pin) dma_ch_samp_cos = dma_claim_unused_channel(true); dma_ch_samp_sin = dma_claim_unused_channel(true); - dma_ch_samp_trig = dma_claim_unused_channel(true); - - dma_t_samp = dma_claim_unused_timer(true); dma_channel_config dma_conf; @@ -318,9 +286,9 @@ static void rf_rx_start(int rx_pin, int bias_pin) channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32); channel_config_set_read_increment(&dma_conf, false); channel_config_set_write_increment(&dma_conf, false); - channel_config_set_dreq(&dma_conf, pio_get_dreq(pio1, 1, false)); + channel_config_set_dreq(&dma_conf, pio_get_dreq(PIO, SM_RX, false)); channel_config_set_chain_to(&dma_conf, dma_ch_cp); - dma_channel_configure(dma_ch_rx, &dma_conf, LO_COS_ACCUMULATOR, &pio1->rxf[1], 1, false); + dma_channel_configure(dma_ch_rx, &dma_conf, LO_COS_ACCUMULATOR, &PIO->rxf[SM_RX], 1, false); /* Copy accumulator I to accumulator Q. */ dma_conf = dma_channel_get_default_config(dma_ch_cp); @@ -356,9 +324,9 @@ static void rf_rx_start(int rx_pin, int bias_pin) channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32); channel_config_set_read_increment(&dma_conf, false); channel_config_set_write_increment(&dma_conf, false); - channel_config_set_dreq(&dma_conf, pio_get_dreq(pio1, 2, true)); + channel_config_set_dreq(&dma_conf, pio_get_dreq(PIO, SM_COS, true)); channel_config_set_chain_to(&dma_conf, dma_ch_pio_sin); - dma_channel_configure(dma_ch_pio_cos, &dma_conf, &pio1->txf[2], LO_COS_ACCUMULATOR, 1, + dma_channel_configure(dma_ch_pio_cos, &dma_conf, &PIO->txf[SM_COS], LO_COS_ACCUMULATOR, 1, false); /* Copy mixed Q accumulator to PIO adder Q. */ @@ -366,71 +334,67 @@ static void rf_rx_start(int rx_pin, int bias_pin) channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32); channel_config_set_read_increment(&dma_conf, false); channel_config_set_write_increment(&dma_conf, false); - channel_config_set_dreq(&dma_conf, pio_get_dreq(pio1, 3, true)); + channel_config_set_dreq(&dma_conf, pio_get_dreq(PIO, SM_SIN, true)); channel_config_set_chain_to(&dma_conf, dma_ch_rx); - dma_channel_configure(dma_ch_pio_sin, &dma_conf, &pio1->txf[3], LO_SIN_ACCUMULATOR, 1, + dma_channel_configure(dma_ch_pio_sin, &dma_conf, &PIO->txf[SM_SIN], LO_SIN_ACCUMULATOR, 1, false); - /* Pacing timer for the sampling script trigger channel. */ - dma_timer_set_fraction(dma_t_samp, 1, CLK_SYS_HZ / (sample_rate * DECIMATE)); - - /* Sampling trigger channel. */ - dma_conf = dma_channel_get_default_config(dma_ch_samp_trig); + /* Trigger I accumulator values push. */ + dma_conf = dma_channel_get_default_config(dma_ch_samp_cos); channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32); channel_config_set_read_increment(&dma_conf, false); channel_config_set_write_increment(&dma_conf, false); channel_config_set_dreq(&dma_conf, dma_get_timer_dreq(dma_t_samp)); channel_config_set_high_priority(&dma_conf, true); - channel_config_set_chain_to(&dma_conf, dma_ch_samp_cos); - dma_channel_configure(dma_ch_samp_trig, &dma_conf, &null, &one, 1, false); - - /* Trigger I accumulator values push. */ - dma_conf = dma_channel_get_default_config(dma_ch_samp_cos); - channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32); - channel_config_set_read_increment(&dma_conf, true); - channel_config_set_write_increment(&dma_conf, false); - channel_config_set_ring(&dma_conf, false, 4); - channel_config_set_high_priority(&dma_conf, true); channel_config_set_chain_to(&dma_conf, dma_ch_samp_sin); - dma_channel_configure(dma_ch_samp_cos, &dma_conf, &pio1->sm[2].instr, samp_insn, 4, false); + dma_channel_configure(dma_ch_samp_cos, &dma_conf, &PIO->sm[SM_COS].instr, &samp_insn, 1, + false); /* Trigger Q accumulator values push. */ dma_conf = dma_channel_get_default_config(dma_ch_samp_sin); channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32); - channel_config_set_read_increment(&dma_conf, true); + channel_config_set_read_increment(&dma_conf, false); channel_config_set_write_increment(&dma_conf, false); - channel_config_set_ring(&dma_conf, false, 4); channel_config_set_high_priority(&dma_conf, true); - channel_config_set_chain_to(&dma_conf, dma_ch_samp_trig); - dma_channel_configure(dma_ch_samp_sin, &dma_conf, &pio1->sm[3].instr, samp_insn, 4, false); + channel_config_set_chain_to(&dma_conf, dma_ch_samp_cos); + dma_channel_configure(dma_ch_samp_sin, &dma_conf, &PIO->sm[SM_SIN].instr, &samp_insn, 1, + false); - bias_init(rx_pin, bias_pin); - adder_init(); + init_bias(); + init_adder(); + init_rx(); dma_channel_start(dma_ch_rx); - dma_channel_start(dma_ch_samp_trig); - watch_init(rx_pin); + dma_channel_start(dma_ch_samp_cos); + + pio_set_sm_mask_enabled(PIO, 0x0f, true); } static void rf_rx_stop(void) { - pio_sm_set_enabled(pio1, 0, false); - pio_sm_set_enabled(pio1, 1, false); - pio_sm_set_enabled(pio1, 2, false); - pio_sm_set_enabled(pio1, 3, false); + pio_set_sm_mask_enabled(PIO, 0x0f, false); - pio_sm_restart(pio1, 0); - pio_sm_restart(pio1, 1); - pio_sm_restart(pio1, 2); - pio_sm_restart(pio1, 3); + pio_sm_restart(PIO, 0); + pio_sm_restart(PIO, 1); + pio_sm_restart(PIO, 2); + pio_sm_restart(PIO, 3); - pio_sm_clear_fifos(pio1, 0); - pio_sm_clear_fifos(pio1, 1); - pio_sm_clear_fifos(pio1, 2); - pio_sm_clear_fifos(pio1, 3); + pio_sm_clear_fifos(PIO, 0); + pio_sm_clear_fifos(PIO, 1); + pio_sm_clear_fifos(PIO, 2); + pio_sm_clear_fifos(PIO, 3); sleep_us(10); + dma_channel_clear_chain_to(dma_ch_rx); + dma_channel_clear_chain_to(dma_ch_cp); + dma_channel_clear_chain_to(dma_ch_cos); + dma_channel_clear_chain_to(dma_ch_sin); + dma_channel_clear_chain_to(dma_ch_pio_cos); + dma_channel_clear_chain_to(dma_ch_pio_sin); + dma_channel_clear_chain_to(dma_ch_samp_cos); + dma_channel_clear_chain_to(dma_ch_samp_sin); + dma_channel_abort(dma_ch_rx); dma_channel_abort(dma_ch_cp); dma_channel_abort(dma_ch_cos); @@ -439,7 +403,6 @@ static void rf_rx_stop(void) dma_channel_abort(dma_ch_pio_sin); dma_channel_abort(dma_ch_samp_cos); dma_channel_abort(dma_ch_samp_sin); - dma_channel_abort(dma_ch_samp_trig); dma_channel_cleanup(dma_ch_rx); dma_channel_cleanup(dma_ch_cp); @@ -449,7 +412,6 @@ static void rf_rx_stop(void) dma_channel_cleanup(dma_ch_pio_sin); dma_channel_cleanup(dma_ch_samp_cos); dma_channel_cleanup(dma_ch_samp_sin); - dma_channel_cleanup(dma_ch_samp_trig); dma_channel_unclaim(dma_ch_rx); dma_channel_unclaim(dma_ch_cp); @@ -459,9 +421,6 @@ static void rf_rx_stop(void) dma_channel_unclaim(dma_ch_pio_sin); dma_channel_unclaim(dma_ch_samp_cos); dma_channel_unclaim(dma_ch_samp_sin); - dma_channel_unclaim(dma_ch_samp_trig); - - dma_timer_unclaim(dma_t_samp); dma_ch_rx = -1; dma_ch_cp = -1; @@ -471,16 +430,46 @@ static void rf_rx_stop(void) dma_ch_pio_sin = -1; dma_ch_samp_cos = -1; dma_ch_samp_sin = -1; - dma_ch_samp_trig = -1; +} - dma_t_samp = -1; +inline static uint32_t pio_sm_get_blocking_unsafe(pio_hw_t *pio, int sm) +{ + while (pio->fstat & (1u << (PIO_FSTAT_RXEMPTY_LSB + sm))) + asm volatile("nop"); + + return pio->rxf[sm]; +} + +inline static int nextI() +{ + static int prevI = 0; + + int sI = 0; + sI -= 2 * pio_sm_get_blocking_unsafe(PIO, SM_COS); + sI -= pio_sm_get_blocking_unsafe(PIO, SM_COS); + + int I = sI - prevI; + prevI = sI; + + return I; +} + +inline static int nextQ() +{ + static int prevQ = 0; + + int sQ = 0; + sQ -= 2 * pio_sm_get_blocking_unsafe(PIO, SM_SIN); + sQ -= pio_sm_get_blocking_unsafe(PIO, SM_SIN); + + int Q = sQ - prevQ; + prevQ = sQ; + + return Q; } static void rf_rx(void) { - const uint32_t base = (uint32_t)rx_cos; - int pos = 0; - while (true) { if (multicore_fifo_rvalid()) { multicore_fifo_pop_blocking(); @@ -488,81 +477,25 @@ static void rf_rx(void) return; } - int head = (dma_hw->ch[dma_ch_in_cos].write_addr - base) / 4; - int delta = (head < pos ? head + RX_WORDS : head) - pos; - - while (delta < RX_STRIDE) { - sleep_us(1); - head = (dma_hw->ch[dma_ch_in_cos].write_addr - base) / 4; - delta = (head < pos ? head + RX_WORDS : head) - pos; - } - - const uint32_t *cos_ptr = rx_cos + pos; - const uint32_t *sin_ptr = rx_sin + pos; - - pos = (pos + RX_STRIDE) & (RX_WORDS - 1); - uint8_t *block = iq_queue_buffer[iq_queue_pos]; uint8_t *blockptr = block; - /* - * Since every 2 samples add to either +1 or -1, - * the maximum amplitude in one direction is 1/2. - */ - int64_t max_amplitude = CLK_SYS_HZ / 2; - - /* - * Since the waveform is normally half of the time - * above zero, we can halve once more. - * - * This is not perfect, so we do not max out the base - * gain but keep it slightly below the maximum to make - * sure we do not overshoot often. - */ - max_amplitude /= 2; - - /* - * We are allowing the counters to only go as high - * as sampling rate. - */ - max_amplitude /= sample_rate; - for (int i = 0; i < IQ_SAMPLES; i++) { - int sI = 0, sQ = 0; + int I = 0, Q = 0; - /* - * I: +I1 -I3 +Q2 -Q4 - * Q: +Q1 -Q3 -I2 +I4 - */ - sI += *cos_ptr++; - sI -= *cos_ptr++; + Q += nextQ(); + I += nextI(); - sQ -= *cos_ptr++; - sQ += *cos_ptr++; + I -= nextQ(); + Q += nextI(); - sI -= *cos_ptr++; - sI += *cos_ptr++; + Q -= nextQ(); + I -= nextI(); - sQ += *cos_ptr++; - sQ -= *cos_ptr++; + I += nextQ(); + Q -= nextI(); - sQ += *sin_ptr++; - sQ -= *sin_ptr++; - - sI += *sin_ptr++; - sI -= *sin_ptr++; - - sQ -= *sin_ptr++; - sQ += *sin_ptr++; - - sI -= *sin_ptr++; - sI += *sin_ptr++; - - int64_t I = sI; - int64_t Q = sQ; - - I *= 127; - I -= (max_amplitude * 181) / 256; + I *= gain; I /= max_amplitude; if (I > 127) @@ -572,8 +505,7 @@ static void rf_rx(void) *blockptr++ = (uint8_t)I + 128; - Q *= 127; - Q -= (max_amplitude * 181) / 256; + Q *= gain; Q /= max_amplitude; if (Q > 127) @@ -587,12 +519,6 @@ static void rf_rx(void) if (queue_try_add(&iq_queue, &block)) { iq_queue_pos = (iq_queue_pos + 1) & (IQ_QUEUE_LEN - 1); } - - /* Randomize LO phase in the next word. */ - for (int i = 0; i < 8; i++) { - lo_tweak(lo_cos, COS_PHASE); - lo_tweak(lo_sin, SIN_PHASE); - } } } @@ -600,18 +526,21 @@ static void run_command(uint8_t cmd, uint32_t arg) { if (0x01 == cmd) { /* Tune to a new center frequency */ - rx_lo_init(arg - sample_rate, true); + frequency = arg; + rx_lo_init(frequency + sample_rate, true); } else if (0x02 == cmd) { /* Set the rate at which IQ sample pairs are sent */ sample_rate = arg; + max_amplitude = CLK_SYS_HZ / sample_rate / 2; dma_timer_set_fraction(dma_t_samp, 1, CLK_SYS_HZ / (sample_rate * DECIMATE)); - rx_lo_init(arg - sample_rate, true); + rx_lo_init(frequency + sample_rate, true); } else if (0x04 == cmd) { /* Set the tuner gain level */ - bias_set_gain((arg + 14) / 30); + gain = INIT_GAIN * pow(10.0, arg / 200.0); } else if (0x0d == cmd) { /* Set tuner gain by the tuner's gain index */ - bias_set_gain((gains[arg] + 14) / 30); + if (arg <= NUM_GAINS) + gain = INIT_GAIN * pow(10.0, gains[arg] / 200.0); } } @@ -639,41 +568,18 @@ static int check_command(void) return -1; } -static void do_rx(int rx_pin, int bias_pin) +static void do_rx() { - rf_rx_start(rx_pin, bias_pin); - sleep_us(100); - - dma_ch_in_cos = dma_claim_unused_channel(true); - dma_ch_in_sin = dma_claim_unused_channel(true); - - dma_channel_config dma_conf; - - dma_conf = dma_channel_get_default_config(dma_ch_in_cos); - channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32); - channel_config_set_read_increment(&dma_conf, false); - channel_config_set_write_increment(&dma_conf, true); - channel_config_set_ring(&dma_conf, true, RX_BITS_DEPTH); - channel_config_set_dreq(&dma_conf, pio_get_dreq(pio1, 2, false)); - channel_config_set_chain_to(&dma_conf, dma_ch_in_sin); - dma_channel_configure(dma_ch_in_cos, &dma_conf, rx_cos, &pio1->rxf[2], 2, false); - - dma_conf = dma_channel_get_default_config(dma_ch_in_sin); - channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32); - channel_config_set_read_increment(&dma_conf, false); - channel_config_set_write_increment(&dma_conf, true); - channel_config_set_ring(&dma_conf, true, RX_BITS_DEPTH); - channel_config_set_dreq(&dma_conf, pio_get_dreq(pio1, 3, false)); - channel_config_set_chain_to(&dma_conf, dma_ch_in_cos); - dma_channel_configure(dma_ch_in_sin, &dma_conf, rx_sin, &pio1->rxf[3], 2, true); - - multicore_launch_core1(rf_rx); - const uint8_t *block; while (queue_try_remove(&iq_queue, &block)) /* Flush the queue */; + rf_rx_start(); + sleep_us(100); + + multicore_launch_core1(rf_rx); + while (true) { int cmd; @@ -684,25 +590,21 @@ static void do_rx(int rx_pin, int bias_pin) if (queue_try_remove(&iq_queue, &block)) { fwrite(block, IQ_BLOCK_LEN, 1, stdout); fflush(stdout); + } else { + int wait = rnd_next() & 0x1fff; + + for (int i = 0; i < wait; i++) + asm volatile("nop"); } } done: multicore_fifo_push_blocking(0); multicore_fifo_pop_blocking(); - sleep_us(10); + sleep_us(100); multicore_reset_core1(); rf_rx_stop(); - - dma_channel_abort(dma_ch_in_cos); - dma_channel_abort(dma_ch_in_sin); - dma_channel_cleanup(dma_ch_in_cos); - dma_channel_cleanup(dma_ch_in_sin); - dma_channel_unclaim(dma_ch_in_cos); - dma_channel_unclaim(dma_ch_in_sin); - dma_ch_in_cos = -1; - dma_ch_in_sin = -1; } int main() @@ -717,6 +619,7 @@ int main() gpio_set_dir(PSU_PIN, GPIO_OUT); gpio_put(PSU_PIN, 1); + /* Prioritize DMA over CPU. */ bus_ctrl_hw->priority |= BUSCTRL_BUS_PRIORITY_DMA_W_BITS | BUSCTRL_BUS_PRIORITY_DMA_R_BITS; stdio_usb_init(); @@ -724,7 +627,11 @@ int main() queue_init(&iq_queue, sizeof(uint8_t *), IQ_QUEUE_LEN); - rx_lo_init(INIT_FREQ - INIT_SAMPLE_RATE, true); + rx_lo_init(frequency + sample_rate, true); + + /* We need to have the sampling timer ready. */ + dma_t_samp = dma_claim_unused_timer(true); + dma_timer_set_fraction(dma_t_samp, 1, CLK_SYS_HZ / (sample_rate * DECIMATE)); while (true) { if (check_command() > 0) { @@ -734,7 +641,7 @@ int main() fwrite(header, sizeof header, 1, stdout); fflush(stdout); - do_rx(10, 11); + do_rx(); } sleep_ms(10);