Improve LO synthesis precision to 7.2 Hz

src/main.c

@@ -25,7 +25,7 @@
 #define CLK_SYS_HZ (300 * MHZ)
 
 #define LO_PIN 9
-#define RX_PIN 8
+#define RX_PIN 13
 #define FB_PIN 5
 #define PSU_PIN 23
 
@@ -39,9 +39,17 @@
 #define IQ_BLOCK_LEN (2 * IQ_SAMPLES)
 #define IQ_QUEUE_LEN 8
 
-#define LO_BITS_DEPTH 15
+#define LO_NUM_PHASES 64
-#define LO_WORDS (1 << (LO_BITS_DEPTH - 2))
+#define LO_PHASE_BITS 10
-static uint32_t lo_cos[LO_WORDS] __attribute__((__aligned__(1 << LO_BITS_DEPTH)));
+#define LO_PHASE_WORDS (1 << (LO_PHASE_BITS - 2))
+#define LO_COS_PHASES 1024
+#define LO_EFFECTIVE_BITS (32 * LO_PHASE_WORDS * LO_COS_PHASES)
+
+static uint32_t lo_phase[LO_NUM_PHASES][LO_PHASE_WORDS]
+	__attribute__((__aligned__(LO_NUM_PHASES * 4 * LO_PHASE_WORDS)));
+
+static const uint32_t *lo_cos_phases[LO_COS_PHASES]
+	__attribute__((__aligned__(1 << LO_PHASE_BITS)));
 
 #define DECIMATE 4
 #define RX_STRIDE (2 * IQ_SAMPLES * DECIMATE)
@@ -63,9 +71,6 @@ static int gains[NUM_GAINS] = { 0,   9,	  14,  27,  37,	 77,  87,  125, 144, 157
 static int sample_rate = INIT_SAMPLE_RATE;
 static int gain = INIT_GAIN;
 
-#define SIN_PHASE (0u)
-#define COS_PHASE (3u << 30)
-
 static int dma_ch_rx1 = -1;
 static int dma_ch_rx2 = -1;
 
@@ -95,8 +100,8 @@ static void init_lo()
 	gpio_disable_pulls(LO_PIN);
 	pio_gpio_init(PIO, LO_PIN);
 
-	gpio_set_drive_strength(LO_PIN, GPIO_DRIVE_STRENGTH_12MA);
+	gpio_set_drive_strength(LO_PIN, GPIO_DRIVE_STRENGTH_2MA);
-	gpio_set_slew_rate(LO_PIN, GPIO_SLEW_RATE_FAST);
+	gpio_set_slew_rate(LO_PIN, GPIO_SLEW_RATE_SLOW);
 
 	const uint16_t insn[] = {
 		pio_encode_out(pio_pindirs, 1),
@@ -245,19 +250,16 @@ static void init_ad()
 }
 
 #define STEP_BASE ((UINT_MAX + 1.0) / CLK_SYS_HZ)
-static uint32_t freq_step = 1;
 
-static void lo_generate(uint32_t *buf, double freq, uint32_t phase)
+static void lo_generate_phase(uint32_t *buf, size_t len, uint32_t step, uint32_t phase)
 {
-	freq_step = STEP_BASE * freq;
+	for (size_t i = 0; i < len; i++) {
-
-	for (size_t i = 0; i < LO_WORDS; i++) {
 		uint32_t bits = 0;
 
 		for (int j = 0; j < 32; j++) {
 			bits |= phase >> 31;
 			bits <<= 1;
-			phase += freq_step;
+			phase += step;
 		}
 
 		buf[i] = bits;
@@ -266,13 +268,25 @@ static void lo_generate(uint32_t *buf, double freq, uint32_t phase)
 
 static void rx_lo_init(double req_freq, bool align)
 {
-	const double step_hz = (double)CLK_SYS_HZ / (8 << LO_BITS_DEPTH);
+	const double step_hz = (double)CLK_SYS_HZ / (LO_EFFECTIVE_BITS / 2.0);
 	double freq = req_freq;
 
 	if (align)
 		freq = round(freq / step_hz) * step_hz;
 
-	lo_generate(lo_cos, freq, COS_PHASE);
+	uint32_t step = STEP_BASE * freq;
+
+	for (uint32_t i = 0; i < LO_NUM_PHASES; i++)
+		lo_generate_phase(lo_phase[i], LO_PHASE_WORDS, step,
+				  i << (__builtin_clz(LO_NUM_PHASES) + 1));
+
+	uint32_t phase_step = step * 32 * LO_PHASE_WORDS;
+	uint32_t phase = 0;
+
+	for (uint32_t i = 0; i < LO_COS_PHASES; i++) {
+		lo_cos_phases[i] = lo_phase[phase >> (__builtin_clz(LO_NUM_PHASES) + 1)];
+		phase += phase_step;
+	}
 }
 
 static const uint32_t samp_insn = 5;
@@ -315,19 +329,18 @@ static void rf_rx_start()
 	channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
 	channel_config_set_read_increment(&dma_conf, true);
 	channel_config_set_write_increment(&dma_conf, false);
-	channel_config_set_ring(&dma_conf, GPIO_IN, LO_BITS_DEPTH);
+	channel_config_set_ring(&dma_conf, GPIO_IN, LO_PHASE_BITS);
-	channel_config_set_dreq(&dma_conf, pio_get_dreq(PIO, LO_SM, GPIO_OUT));
+	dma_channel_configure(dma_ch_mix1, &dma_conf, &dma_hw->ch[dma_ch_mix2].al3_read_addr_trig,
-	channel_config_set_chain_to(&dma_conf, dma_ch_mix2);
+			      lo_cos_phases, 1, false);
-	dma_channel_configure(dma_ch_mix1, &dma_conf, &PIO->txf[LO_SM], lo_cos, UINT_MAX, false);
 
 	dma_conf = dma_channel_get_default_config(dma_ch_mix2);
 	channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
 	channel_config_set_read_increment(&dma_conf, true);
 	channel_config_set_write_increment(&dma_conf, false);
-	channel_config_set_ring(&dma_conf, GPIO_IN, LO_BITS_DEPTH);
 	channel_config_set_dreq(&dma_conf, pio_get_dreq(PIO, LO_SM, GPIO_OUT));
 	channel_config_set_chain_to(&dma_conf, dma_ch_mix1);
-	dma_channel_configure(dma_ch_mix2, &dma_conf, &PIO->txf[LO_SM], lo_cos, UINT_MAX, false);
+	dma_channel_configure(dma_ch_mix2, &dma_conf, &PIO->txf[LO_SM], NULL, LO_PHASE_WORDS,
+			      false);
 
 	/* Pacing timer for the sampling script trigger channel. */
 	dma_timer_set_fraction(dma_t_samp, 1, CLK_SYS_HZ / (sample_rate * DECIMATE));
@@ -395,33 +408,44 @@ static void rf_rx_stop(void)
 	dma_t_samp = -1;
 }
 
-inline static int next_sample(const uint32_t *buf, int *h)
+struct IQ {
+	int I, Q;
+};
+
+inline static struct IQ next_sample(const uint32_t *buf)
 {
-	int x3 = 2 * (buf[0] - buf[1]);
+	static int h[11];
-	int x2 = 0;
+
-	int x1 = 2 * (buf[5] - buf[4]);
+	int x3 = buf[0] - buf[1];
-	int x0 = 0;
+	int x2 = buf[2] - buf[3];
+	int x1 = buf[5] - buf[4];
+	int x0 = buf[7] - buf[6];
 
 	const int c[] = { 4, 2, -8, -9, 19, 55 };
 
-	int sample = 0;
+	int I = 0, Q = 0;
-	sample += (c[0]) * h[10];
+
-	sample += (c[0] + c[1]) * h[9];
+	Q += (c[0]) * h[10];
-	sample += (c[0] + c[1] + c[2]) * h[8];
+	I += (c[0] + c[1]) * h[9];
-	sample += (c[0] + c[1] + c[2] + c[3]) * h[7];
+	Q += (c[0] + c[1] + c[2]) * h[8];
-	sample += (c[1] + c[2] + c[3] + c[4]) * h[6];
+	I += (c[0] + c[1] + c[2] + c[3]) * h[7];
-	sample += (c[2] + c[3] + c[4] + c[5]) * h[5];
+	Q += (c[1] + c[2] + c[3] + c[4]) * h[6];
-	sample += (c[3] + c[4] + c[5] + c[5]) * h[4];
+	I += (c[2] + c[3] + c[4] + c[5]) * h[5];
-	sample += (c[4] + c[5] + c[5] + c[4]) * h[3];
+	Q += (c[3] + c[4] + c[5] + c[5]) * h[4];
-	sample += (c[5] + c[5] + c[4] + c[3]) * h[2];
+	I += (c[4] + c[5] + c[5] + c[4]) * h[3];
-	sample += (c[5] + c[4] + c[3] + c[2]) * h[1];
+	Q += (c[5] + c[5] + c[4] + c[3]) * h[2];
-	sample += (c[4] + c[3] + c[2] + c[1]) * h[0];
+	I += (c[5] + c[4] + c[3] + c[2]) * h[1];
-	sample += (c[3] + c[2] + c[1] + c[0]) * x3;
+	Q += (c[4] + c[3] + c[2] + c[1]) * h[0];
-	sample += (c[2] + c[1] + c[0]) * x2;
+	I += (c[3] + c[2] + c[1] + c[0]) * x3;
-	sample += (c[1] + c[0]) * x1;
+	Q += (c[2] + c[1] + c[0]) * x2;
-	sample += (c[0]) * x0;
+	I += (c[1] + c[0]) * x1;
-	sample *= gain;
+	Q += (c[0]) * x0;
-	sample /= 256;
+
+	I *= gain;
+	I /= 128;
+
+	Q *= gain;
+	Q /= 128;
 
 	h[10] = h[6];
 	h[9] = h[5];
@@ -435,14 +459,12 @@ inline static int next_sample(const uint32_t *buf, int *h)
 	h[1] = x1;
 	h[0] = x0;
 
-	return sample;
+	return (struct IQ){ I, Q };
 }
 
 static void rf_rx(void)
 {
 	const uint32_t base = (uint32_t)rx_cos;
-	int prevI[11] = { 0 };
-	int prevQ[11] = { 0 };
 	int pos = 0;
 
 	while (true) {
@@ -480,9 +502,10 @@ static void rf_rx(void)
 		int64_t max_amplitude = CLK_SYS_HZ / 2 / sample_rate;
 
 		for (int i = 0; i < IQ_SAMPLES; i++) {
-			int64_t I = next_sample(cos_ptr + 0, prevI);
+			struct IQ IQ = next_sample(cos_ptr);
-			int64_t Q = next_sample(cos_ptr + 2, prevQ);
+			int64_t I = IQ.I;
-			cos_ptr += 8;
+			int64_t Q = IQ.Q;
+			cos_ptr += 2 * DECIMATE;
 
 			I -= (max_amplitude * 181) / 256;
 			I /= max_amplitude;