wip

.gitignore

@@ -1,2 +1,3 @@
 /build/
 /grc/*.py
+/.cache/

grc/PicoSDR.grc

@@ -37,7 +37,7 @@ blocks:
   id: variable
   parameters:
     comment: ''
-    value: '40_680_000'
+    value: 169.5e6
   states:
     bus_sink: false
     bus_source: false
@@ -49,24 +49,24 @@ blocks:
   id: variable
   parameters:
     comment: ''
-    value: '4'
+    value: '16'
   states:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [352, 8.0]
+    coordinate: [368, 8.0]
     rotation: 0
     state: enabled
 - name: rf_rate
   id: variable
   parameters:
     comment: ''
-    value: '200_000'
+    value: '400_000'
   states:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [264, 8.0]
+    coordinate: [280, 8.0]
     rotation: 0
     state: enabled
 - name: samp_rate
@@ -78,7 +78,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [456, 8.0]
+    coordinate: [472, 8.0]
     rotation: 0
     state: enabled
 - name: analog_agc_xx_0
@@ -88,17 +88,17 @@ blocks:
     alias: ''
     comment: ''
     gain: '1.0'
-    max_gain: '65536'
+    max_gain: '1'
     maxoutbuf: '0'
     minoutbuf: '0'
     rate: 1e-4
-    reference: '0.7'
+    reference: '0.707'
     type: complex
   states:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [360, 312.0]
+    coordinate: [632, 312.0]
     rotation: 0
     state: enabled
 - name: analog_quadrature_demod_cf_0
@@ -114,9 +114,26 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [768, 616.0]
+    coordinate: [912, 616.0]
     rotation: 0
     state: true
+- name: blocks_freqshift_cc_0
+  id: blocks_freqshift_cc
+  parameters:
+    affinity: ''
+    alias: ''
+    comment: ''
+    freq: '0'
+    maxoutbuf: '0'
+    minoutbuf: '0'
+    sample_rate: rf_rate
+  states:
+    bus_sink: false
+    bus_source: false
+    bus_structure: null
+    coordinate: [256, 328.0]
+    rotation: 0
+    state: enabled
 - name: blocks_message_debug_0
   id: blocks_message_debug
   parameters:
@@ -129,7 +146,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [1056, 112.0]
+    coordinate: [1200, 112.0]
     rotation: 0
     state: true
 - name: blocks_probe_rate_0
@@ -149,7 +166,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [768, 120.0]
+    coordinate: [912, 120.0]
     rotation: 0
     state: true
 - name: digital_costas_loop_cc_0
@@ -162,12 +179,12 @@ blocks:
     minoutbuf: '0'
     order: '2'
     use_snr: 'False'
-    w: 2 * math.pi / 100
+    w: math.pi / 100
   states:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [768, 424.0]
+    coordinate: [912, 424.0]
     rotation: 0
     state: true
 - name: low_pass_filter_0
@@ -177,7 +194,7 @@ blocks:
     alias: ''
     beta: '6.76'
     comment: ''
-    cutoff_freq: samp_rate / 8
+    cutoff_freq: samp_rate / 4
     decim: decimation
     gain: '1'
     interp: '1'
@@ -185,13 +202,13 @@ blocks:
     minoutbuf: '0'
     samp_rate: rf_rate
     type: fir_filter_ccf
-    width: samp_rate / 8
+    width: samp_rate / 4
     win: window.WIN_HAMMING
   states:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [520, 284.0]
+    coordinate: [440, 284.0]
     rotation: 0
     state: enabled
 - name: osmosdr_source_0
@@ -548,7 +565,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [104, 244.0]
+    coordinate: [8, 244.0]
     rotation: 0
     state: enabled
 - name: qtgui_const_sink_x_0
@@ -640,7 +657,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [1056, 408.0]
+    coordinate: [1200, 408.0]
     rotation: 0
     state: true
 - name: qtgui_time_sink_x_0
@@ -700,7 +717,7 @@ blocks:
     nconnections: '1'
     size: '256'
     srate: samp_rate
-    stemplot: 'False'
+    stemplot: 'True'
     style1: '1'
     style10: '1'
     style2: '1'
@@ -737,7 +754,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [768, 312.0]
+    coordinate: [912, 312.0]
     rotation: 0
     state: true
 - name: qtgui_time_sink_x_0_0
@@ -797,7 +814,7 @@ blocks:
     nconnections: '1'
     size: '256'
     srate: samp_rate
-    stemplot: 'False'
+    stemplot: 'True'
     style1: '1'
     style10: '1'
     style2: '1'
@@ -816,7 +833,7 @@ blocks:
     tr_tag: '""'
     type: float
     update_time: 1/30
-    width1: '1'
+    width1: '2'
     width10: '1'
     width2: '1'
     width3: '1'
@@ -834,7 +851,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [1056, 592.0]
+    coordinate: [1200, 592.0]
     rotation: 0
     state: true
 - name: qtgui_time_sink_x_0_1
@@ -894,7 +911,7 @@ blocks:
     nconnections: '1'
     size: '256'
     srate: samp_rate
-    stemplot: 'False'
+    stemplot: 'True'
     style1: '1'
     style10: '1'
     style2: '1'
@@ -913,9 +930,9 @@ blocks:
     tr_tag: '""'
     type: complex
     update_time: 1/30
-    width1: '1'
+    width1: '2'
     width10: '1'
-    width2: '1'
+    width2: '2'
     width3: '1'
     width4: '1'
     width5: '1'
@@ -931,7 +948,7 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [1056, 480.0]
+    coordinate: [1200, 480.0]
     rotation: 0
     state: true
 - name: qtgui_waterfall_sink_x_0_0
@@ -992,23 +1009,24 @@ blocks:
     bus_sink: false
     bus_source: false
     bus_structure: null
-    coordinate: [768, 208.0]
+    coordinate: [912, 208.0]
     rotation: 0
     state: true
 
 connections:
-- [analog_agc_xx_0, '0', low_pass_filter_0, '0']
+- [analog_agc_xx_0, '0', analog_quadrature_demod_cf_0, '0']
+- [analog_agc_xx_0, '0', blocks_probe_rate_0, '0']
+- [analog_agc_xx_0, '0', digital_costas_loop_cc_0, '0']
+- [analog_agc_xx_0, '0', qtgui_time_sink_x_0, '0']
+- [analog_agc_xx_0, '0', qtgui_waterfall_sink_x_0_0, '0']
 - [analog_quadrature_demod_cf_0, '0', qtgui_time_sink_x_0_0, '0']
+- [blocks_freqshift_cc_0, '0', low_pass_filter_0, '0']
 - [blocks_probe_rate_0, rate, blocks_message_debug_0, print]
 - [digital_costas_loop_cc_0, '0', qtgui_const_sink_x_0, '0']
 - [digital_costas_loop_cc_0, '0', qtgui_time_sink_x_0_1, '0']
-- [low_pass_filter_0, '0', analog_quadrature_demod_cf_0, '0']
+- [low_pass_filter_0, '0', analog_agc_xx_0, '0']
-- [low_pass_filter_0, '0', blocks_probe_rate_0, '0']
+- [osmosdr_source_0, '0', blocks_freqshift_cc_0, '0']
-- [low_pass_filter_0, '0', digital_costas_loop_cc_0, '0']
-- [low_pass_filter_0, '0', qtgui_time_sink_x_0, '0']
-- [low_pass_filter_0, '0', qtgui_waterfall_sink_x_0_0, '0']
-- [osmosdr_source_0, '0', analog_agc_xx_0, '0']
 
 metadata:
   file_format: 1
-  grc_version: 3.10.9.2
+  grc_version: 3.10.11.0

src/CMakeLists.txt

@@ -36,16 +36,5 @@ target_compile_definitions(pico_sdr PUBLIC PICO_STDIO_DEFAULT_CRLF=0)
 
 target_include_directories(pico_sdr PRIVATE include)
 
-target_compile_definitions(pico_sdr PRIVATE
-	PLL_SYS_REFDIV=1
-	PLL_SYS_VCO_FREQ_HZ=2400000000
-	PLL_SYS_POSTDIV1=5
-	PLL_SYS_POSTDIV2=2
-	SYS_CLK_HZ=240000000
-
-  SYS_CLK_VREG_VOLTAGE_AUTO_ADJUST=1
-  SYS_CLK_VREG_VOLTAGE_MIN=VREG_VOLTAGE_1_30
-)
-
 #pico_set_binary_type(pico_sdr no_flash)
 pico_set_binary_type(pico_sdr copy_to_ram)

src/main.c

@@ -21,42 +21,44 @@
 #include <limits.h>
 #include <stdlib.h>
 
-#define RX_PIN  10
+#define VREG_VOLTAGE VREG_VOLTAGE_1_30
-#define FB_PIN  6
+#define CLK_SYS_HZ (300 * MHZ)
+
+#define RX_PIN 10
+#define FB_PIN 6
 #define PSU_PIN 23
+#define AMP_PIN 21
 
-#define PIO     pio0
+#define PIO pio0
-#define SM_RX   0
+#define SM_RX 0
 #define SM_BIAS 1
-#define SM_COS  2
+#define SM_COS 2
-#define SM_SIN  3
+#define SM_SIN 3
 
-#define IQ_SAMPLES   32
+#define IQ_SAMPLES 32
 #define IQ_BLOCK_LEN (2 * IQ_SAMPLES)
 #define IQ_QUEUE_LEN 16
 
-#define XOR_ADDR           0x1000
+#define XOR_ADDR 0x1000
-#define LO_BITS_DEPTH      15
+#define LO_BITS_DEPTH 15
-#define LO_WORDS           (1 << (LO_BITS_DEPTH - 2))
+#define LO_WORDS (1 << (LO_BITS_DEPTH - 2))
 #define LO_COS_ACCUMULATOR (&PIO->sm[SM_COS].pinctrl)
 #define LO_SIN_ACCUMULATOR (&PIO->sm[SM_SIN].pinctrl)
-#define SIN_PHASE          (0u)
+#define SIN_PHASE (0u)
-#define COS_PHASE          (3u << 30)
+#define COS_PHASE (3u << 30)
 
 static uint32_t lo_cos[LO_WORDS] __aligned(1 << LO_BITS_DEPTH);
 static uint32_t lo_sin[LO_WORDS] __aligned(1 << LO_BITS_DEPTH);
 
 #define INIT_SAMPLE_RATE 100000
-#define INIT_FREQ        94600000
+#define INIT_FREQ 94600000
 
 static int frequency = INIT_FREQ;
 static int sample_rate = INIT_SAMPLE_RATE;
 
-#define ATTN_BITS 16
+#define DECIMATE 4
-#define BASE_GAIN (1 << 23)
-#define DC_OFFSET (int)(127.4 * (1 << ATTN_BITS))
 
-static int gain = BASE_GAIN / (SYS_CLK_HZ / INIT_SAMPLE_RATE);
+static int gain = 0x7fff / 750;
 
 static queue_t iq_queue;
 static uint8_t iq_queue_buffer[IQ_QUEUE_LEN][IQ_BLOCK_LEN];
@@ -105,7 +107,7 @@ static void init_rx()
 	pio_gpio_init(PIO, RX_PIN);
 
 	const uint16_t insn[] = {
-		pio_encode_in(pio_pins, 1),
+		pio_encode_in(pio_pins, 1) | pio_encode_delay(0),
 	};
 
 	pio_program_t prog = {
@@ -141,7 +143,7 @@ static void init_bias()
 
 	const uint16_t insn[] = {
 		pio_encode_mov_not(pio_pins, pio_pins) | pio_encode_sideset(1, 1) |
-		        pio_encode_delay(0),
+			pio_encode_delay(0),
 	};
 
 	pio_program_t prog = {
@@ -238,9 +240,9 @@ static void lo_generate_phase(uint32_t *buf, size_t len, uint32_t step, uint32_t
 
 static void rx_lo_init(double freq)
 {
-	double n = round(freq * (8 << LO_BITS_DEPTH) / SYS_CLK_HZ);
+	double n = round(freq * (8 << LO_BITS_DEPTH) / CLK_SYS_HZ);
-	freq = n * SYS_CLK_HZ / (8 << LO_BITS_DEPTH);
+	freq = n * CLK_SYS_HZ / (8 << LO_BITS_DEPTH);
-	uint32_t step = freq * 4294967296.0 / SYS_CLK_HZ;
+	uint32_t step = fmod(freq * 4294967296.0 / CLK_SYS_HZ, 4294967296.0);
 	lo_generate_phase(lo_cos, LO_WORDS, step, COS_PHASE);
 	lo_generate_phase(lo_sin, LO_WORDS, step, SIN_PHASE);
 }
@@ -275,7 +277,7 @@ static void rf_rx_start()
 	channel_config_set_write_increment(&dma_conf, false);
 	channel_config_set_chain_to(&dma_conf, dma_ch_cos);
 	dma_channel_configure(dma_ch_cp, &dma_conf, LO_SIN_ACCUMULATOR, LO_COS_ACCUMULATOR, 1,
-	                      false);
+			      false);
 
 	/* Read lo_cos into accumulator I with XOR. */
 	dma_conf = dma_channel_get_default_config(dma_ch_cos);
@@ -285,7 +287,7 @@ static void rf_rx_start()
 	channel_config_set_ring(&dma_conf, false, LO_BITS_DEPTH);
 	channel_config_set_chain_to(&dma_conf, dma_ch_sin);
 	dma_channel_configure(dma_ch_cos, &dma_conf, LO_COS_ACCUMULATOR + XOR_ADDR / 4, lo_cos, 1,
-	                      false);
+			      false);
 
 	/* Read lo_sin into accumulator Q with XOR. */
 	dma_conf = dma_channel_get_default_config(dma_ch_sin);
@@ -295,7 +297,7 @@ static void rf_rx_start()
 	channel_config_set_ring(&dma_conf, false, LO_BITS_DEPTH);
 	channel_config_set_chain_to(&dma_conf, dma_ch_pio_cos);
 	dma_channel_configure(dma_ch_sin, &dma_conf, LO_SIN_ACCUMULATOR + XOR_ADDR / 4, lo_sin, 1,
-	                      false);
+			      false);
 
 	/* Copy mixed I accumulator to PIO adder I. */
 	dma_conf = dma_channel_get_default_config(dma_ch_pio_cos);
@@ -305,7 +307,7 @@ static void rf_rx_start()
 	channel_config_set_dreq(&dma_conf, pio_get_dreq(PIO, SM_COS, true));
 	channel_config_set_chain_to(&dma_conf, dma_ch_pio_sin);
 	dma_channel_configure(dma_ch_pio_cos, &dma_conf, &PIO->txf[SM_COS], LO_COS_ACCUMULATOR, 1,
-	                      false);
+			      false);
 
 	/* Copy mixed Q accumulator to PIO adder Q. */
 	dma_conf = dma_channel_get_default_config(dma_ch_pio_sin);
@@ -315,7 +317,7 @@ static void rf_rx_start()
 	channel_config_set_dreq(&dma_conf, pio_get_dreq(PIO, SM_SIN, true));
 	channel_config_set_chain_to(&dma_conf, dma_ch_rx);
 	dma_channel_configure(dma_ch_pio_sin, &dma_conf, &PIO->txf[SM_SIN], LO_SIN_ACCUMULATOR, 1,
-	                      false);
+			      false);
 
 	/* Trigger I accumulator values push. */
 	dma_conf = dma_channel_get_default_config(dma_ch_samp_cos);
@@ -326,7 +328,7 @@ static void rf_rx_start()
 	channel_config_set_high_priority(&dma_conf, true);
 	channel_config_set_chain_to(&dma_conf, dma_ch_samp_sin);
 	dma_channel_configure(dma_ch_samp_cos, &dma_conf, &PIO->sm[SM_COS].instr, &samp_insn, 1,
-	                      false);
+			      false);
 
 	/* Trigger Q accumulator values push. */
 	dma_conf = dma_channel_get_default_config(dma_ch_samp_sin);
@@ -336,7 +338,7 @@ static void rf_rx_start()
 	channel_config_set_high_priority(&dma_conf, true);
 	channel_config_set_chain_to(&dma_conf, dma_ch_samp_cos);
 	dma_channel_configure(dma_ch_samp_sin, &dma_conf, &PIO->sm[SM_SIN].instr, &samp_insn, 1,
-	                      false);
+			      false);
 
 	init_bias();
 	init_adder();
@@ -415,11 +417,25 @@ inline static void led_set(bool on)
 	gpio_put(PICO_DEFAULT_LED_PIN, on);
 }
 
-inline static int getI()
+inline static uint32_t pio_sm_get_blocking_unsafe(pio_hw_t *pio, int sm)
+{
+	while (pio->fstat & (1u << (PIO_FSTAT_RXEMPTY_LSB + sm)))
+		asm volatile("nop");
+
+	return pio->rxf[sm];
+}
+
+static int Ia1, Ia2, Ia3;
+static int Ib1, Ib2, Ib3;
+
+static int Qa1, Qa2, Qa3;
+static int Qb1, Qb2, Qb3;
+
+inline static void accI()
 {
 	static uint16_t py, px;
 
-	uint32_t yx = pio_sm_get_blocking(PIO, SM_COS);
+	uint32_t yx = pio_sm_get_blocking_unsafe(PIO, SM_COS);
 	uint16_t y = yx >> 16;
 	uint16_t x = yx;
 
@@ -429,40 +445,70 @@ inline static int getI()
 	py = y;
 	px = x;
 
-	int s = ((ny << 1) + nx) * gain;
+	uint32_t s = (ny << 1) + nx;
 
-	static int dc;
+	Ia1 += s;
-	dc += (s - dc) >> ATTN_BITS;
+	Ia2 += Ia1;
-	s -= dc;
+	Ia3 += Ia2;
+}
 
-	return (s + DC_OFFSET) >> ATTN_BITS;
+inline static void accQ()
+{
+	static uint16_t py, px;
+
+	uint32_t yx = pio_sm_get_blocking_unsafe(PIO, SM_SIN);
+	uint16_t y = yx >> 16;
+	uint16_t x = yx;
+
+	uint16_t ny = py - y;
+	uint16_t nx = px - x;
+
+	py = y;
+	px = x;
+
+	uint32_t s = (ny << 1) + nx;
+
+	Qa1 += s;
+	Qa2 += Qa1;
+	Qa3 += Qa2;
+}
+
+inline static int getI()
+{
+	uint32_t c1, c2, c3;
+
+	c3 = Ia3 - Ib3;
+	Ib3 = Ia3;
+
+	c2 = c3 - Ib2;
+	Ib2 = c3;
+
+	c1 = c2 - Ib1;
+	Ib1 = c2;
+
+	return (int)c1;
 }
 
 inline static int getQ()
 {
-	static uint16_t py, px;
+	uint32_t c1, c2, c3;
 
-	uint32_t yx = pio_sm_get_blocking(PIO, SM_SIN);
+	c3 = Qa3 - Qb3;
-	uint16_t y = yx >> 16;
+	Qb3 = Qa3;
-	uint16_t x = yx;
 
-	uint16_t ny = py - y;
+	c2 = c3 - Qb2;
-	uint16_t nx = px - x;
+	Qb2 = c3;
 
-	py = y;
+	c1 = c2 - Qb1;
-	px = x;
+	Qb1 = c2;
 
-	int s = ((ny << 1) + nx) * gain;
+	return (int)c1;
-
-	static int dc;
-	dc += (s - dc) >> ATTN_BITS;
-	s -= dc;
-
-	return (s + DC_OFFSET) >> ATTN_BITS;
 }
 
 static void rf_rx(void)
 {
+	int dcI = 0, dcQ = 0;
+
 	while (true) {
 		if (multicore_fifo_rvalid()) {
 			multicore_fifo_pop_blocking();
@@ -474,21 +520,57 @@ static void rf_rx(void)
 		uint8_t *blockptr = block;
 
 		for (int i = 0; i < IQ_SAMPLES; i++) {
-			int I = getI();
+			for (int d = 0; d < DECIMATE; d++) {
-			int Q = getQ();
+				accI();
+				accQ();
+			}
 
-			if (I < 0)
+			// ~22-24b
-				I = 0;
+			int I = getI() << 12;
-			else if (I > 255)
+			int Q = getQ() << 12;
-				I = 255;
 
-			if (Q < 0)
+			dcI += (I - dcI) >> 12;
-				Q = 0;
+			dcQ += (Q - dcQ) >> 12;
-			else if (Q > 255)
-				Q = 255;
 
-			*blockptr++ = I;
+			I -= dcI;
-			*blockptr++ = Q;
+			Q -= dcQ;
+
+			// ~10-12b
+			I >>= 12;
+			Q >>= 12;
+
+			// ~8b
+			I = (I * gain) >> 16;
+			Q = (Q * gain) >> 16;
+
+			int absI = abs(I);
+			int absQ = abs(Q);
+
+			if (absI >= 96 || absQ >= 96) {
+				gain--;
+			} else {
+				gain++;
+			}
+
+			if (I < -128)
+				I = -128;
+
+			if (I > 127)
+				I = 127;
+
+			if (Q < -128)
+				Q = -128;
+
+			if (Q > 127)
+				Q = 127;
+
+			if (gain < 1)
+				gain = 1;
+			else if (gain > 0xffff)
+				gain = 0xffff;
+
+			*blockptr++ = I + 128;
+			*blockptr++ = Q + 128;
 		}
 
 		if (queue_try_add(&iq_queue, &block)) {
@@ -509,8 +591,7 @@ static void run_command(uint8_t cmd, uint32_t arg)
 	} else if (0x02 == cmd) {
 		/* Set the rate at which IQ sample pairs are sent */
 		sample_rate = arg;
-		gain = BASE_GAIN / (SYS_CLK_HZ / sample_rate);
+		dma_timer_set_fraction(dma_t_samp, 1, CLK_SYS_HZ / (sample_rate * DECIMATE));
-		dma_timer_set_fraction(dma_t_samp, 1, SYS_CLK_HZ / sample_rate);
 		rx_lo_init(frequency);
 	}
 }
@@ -562,7 +643,10 @@ static void do_rx()
 			fwrite(block, IQ_BLOCK_LEN, 1, stdout);
 			fflush(stdout);
 		} else {
-			sleep_us(10);
+			int wait = xorshift() >> (32 - 15);
+
+			for (int i = 0; i < wait; i++)
+				asm volatile("nop");
 		}
 	}
 
@@ -577,11 +661,20 @@ done:
 
 int main()
 {
+	vreg_set_voltage(VREG_VOLTAGE);
+	set_sys_clock_khz(CLK_SYS_HZ / KHZ, true);
+	clock_configure(clk_peri, 0, CLOCKS_CLK_PERI_CTRL_AUXSRC_VALUE_CLKSRC_PLL_SYS, CLK_SYS_HZ,
+			CLK_SYS_HZ);
+
 	/* Enable PSU PWM mode. */
 	gpio_init(PSU_PIN);
 	gpio_set_dir(PSU_PIN, GPIO_OUT);
 	gpio_put(PSU_PIN, 1);
 
+	gpio_init(AMP_PIN);
+	gpio_set_dir(AMP_PIN, GPIO_OUT);
+	gpio_put(AMP_PIN, 1);
+
 	gpio_init(PICO_DEFAULT_LED_PIN);
 	gpio_set_dir(PICO_DEFAULT_LED_PIN, GPIO_OUT);
 	gpio_put(PICO_DEFAULT_LED_PIN, 0);
@@ -598,13 +691,13 @@ int main()
 
 	/* We need to have the sampling timer ready. */
 	dma_t_samp = dma_claim_unused_timer(true);
-	dma_timer_set_fraction(dma_t_samp, 1, SYS_CLK_HZ / sample_rate);
+	dma_timer_set_fraction(dma_t_samp, 1, CLK_SYS_HZ / (sample_rate * DECIMATE));
 
 	while (true) {
 		if (check_command() > 0) {
 			static const uint32_t header[3] = { __builtin_bswap32(0x52544c30),
-				                            __builtin_bswap32(5),
+							    __builtin_bswap32(5),
-				                            __builtin_bswap32(29) };
+							    __builtin_bswap32(29) };
 			fwrite(header, sizeof header, 1, stdout);
 			fflush(stdout);
 

util/bridge.py

@@ -1,8 +1,15 @@
 #!/usr/bin/env python
 
 import struct
-from socket import (AF_INET, MSG_DONTWAIT, SO_REUSEADDR, SO_SNDBUF,
+from socket import (
-                    SOCK_STREAM, SOL_SOCKET, socket)
+    AF_INET6,
+    MSG_DONTWAIT,
+    SO_REUSEADDR,
+    SO_SNDBUF,
+    SOCK_STREAM,
+    SOL_SOCKET,
+    socket,
+)
 
 import click
 import serial
@@ -37,12 +44,12 @@ def describe(cmd: int, arg: int):
 @click.option("-f", "--frequency", default=88200000, help="Frequency to tune to")
 @click.option("-d", "--device", default="/dev/ttyACM0", help="Serial port device")
 def bridge(frequency, device):
-    sock = socket(AF_INET, SOCK_STREAM)
+    sock = socket(AF_INET6, SOCK_STREAM)
     sock.setsockopt(SOL_SOCKET, SO_REUSEADDR, 1)
     sock.setsockopt(SOL_SOCKET, SO_SNDBUF, 1024 * 100)
 
-    print("Posing as rtl_tcp at tcp://127.0.0.1:1234")
+    print("Posing as rtl_tcp at tcp://localhost:1234")
-    sock.bind(("127.0.0.1", 1234))
+    sock.bind(("::", 1234))
     sock.listen(3)
 
     while True: