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@ -21,68 +21,54 @@
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#include <limits.h>
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#include <stdlib.h>
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#include "cordic.h"
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#define VREG_VOLTAGE VREG_VOLTAGE_1_20
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#define CLK_SYS_HZ (306 * MHZ)
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#define RX_PIN 10
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#define FB_PIN 11
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#define CLK_SYS_HZ (300 * MHZ)
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#define PSU_PIN 23
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#define PIO pio0
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#define SM_RX 0
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#define SM_BIAS 1
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#define SM_COS 2
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#define SM_SIN 3
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#define IQ_SAMPLES 32
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#define IQ_BLOCK_LEN (2 * IQ_SAMPLES)
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#define IQ_QUEUE_LEN 8
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#define IQ_QUEUE_LEN 64
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#define XOR_ADDR 0x1000
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#define LO_COS_ACCUMULATOR (&pio1->sm[2].pinctrl)
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#define LO_SIN_ACCUMULATOR (&pio1->sm[3].pinctrl)
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#define LO_BITS_DEPTH 15
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#define LO_WORDS (1 << (LO_BITS_DEPTH - 2))
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#define LO_COS_ACCUMULATOR (&PIO->sm[SM_COS].pinctrl)
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#define LO_SIN_ACCUMULATOR (&PIO->sm[SM_SIN].pinctrl)
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#define SIN_PHASE (0u)
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#define COS_PHASE (3u << 30)
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static uint32_t lo_cos[LO_WORDS] __attribute__((__aligned__(1 << LO_BITS_DEPTH)));
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static uint32_t lo_sin[LO_WORDS] __attribute__((__aligned__(1 << LO_BITS_DEPTH)));
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#define DECIMATE 4
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#define RX_STRIDE (2 * IQ_SAMPLES * DECIMATE)
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#define RX_BITS_DEPTH 13
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#define RX_WORDS (1 << (RX_BITS_DEPTH - 2))
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static_assert(RX_STRIDE * 4 < RX_WORDS, "RX_STRIDE * 4 < RX_WORDS");
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static uint32_t rx_cos[RX_WORDS] __attribute__((__aligned__(1 << RX_BITS_DEPTH)));
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static uint32_t rx_sin[RX_WORDS] __attribute__((__aligned__(1 << RX_BITS_DEPTH)));
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#define AOUT_PIN 0
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#define AOUT_BITS_DEPTH 9
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#define AOUT_WORDS (1 << (AOUT_BITS_DEPTH - 1))
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static uint16_t aout_buf[AOUT_WORDS] __attribute__((__aligned__(1 << AOUT_BITS_DEPTH)));
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#define INIT_GAIN 120
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#define INIT_SAMPLE_RATE 100000
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#define INIT_FREQ 94600000
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#define INIT_GAIN 127
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#define NUM_GAINS 29
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static int gains[NUM_GAINS] = { 0, 9, 14, 27, 37, 77, 87, 125, 144, 157,
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166, 197, 207, 229, 254, 280, 297, 328, 338, 364,
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372, 386, 402, 421, 434, 439, 445, 480, 496 };
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static int sample_rate = INIT_SAMPLE_RATE;
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static int max_amplitude = CLK_SYS_HZ / INIT_SAMPLE_RATE / 2;
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static int gain = INIT_GAIN;
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static int frequency = INIT_FREQ;
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static int sample_rate = INIT_SAMPLE_RATE;
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static queue_t iq_queue;
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static uint8_t iq_queue_buffer[IQ_QUEUE_LEN][IQ_BLOCK_LEN];
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static size_t iq_queue_pos = 0;
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static uint32_t rnd = 0;
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inline static __unused uint32_t rnd_next()
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{
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rnd = rnd * 0x41c64e6d + 12345;
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return rnd;
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}
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static void dma_channel_clear_chain_to(int ch)
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{
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uint32_t ctrl = dma_hw->ch[ch].al1_ctrl;
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ctrl &= ~DMA_CH0_CTRL_TRIG_CHAIN_TO_BITS;
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ctrl |= ch << DMA_CH0_CTRL_TRIG_CHAIN_TO_LSB;
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dma_hw->ch[ch].al1_ctrl = ctrl;
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}
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#define SIN_PHASE (0u)
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#define COS_PHASE (3u << 30)
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/* rx -> cp -> cos -> sin -> pio_cos -> pio_sin -> rx ... */
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static int dma_ch_rx = -1;
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@ -92,156 +78,186 @@ static int dma_ch_sin = -1;
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static int dma_ch_pio_cos = -1;
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static int dma_ch_pio_sin = -1;
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static int dma_ch_samp_trig = -1;
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static int dma_ch_samp_cos = -1;
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static int dma_ch_samp_sin = -1;
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static int dma_t_samp = -1;
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static int origin_rx = -1;
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static int origin_bias = -1;
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static int origin_adder = 0;
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static int dma_ch_in_cos = -1;
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static int dma_ch_in_sin = -1;
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static void init_rx()
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static int dma_ch_aout = -1;
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static int dma_t_aout = -1;
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static queue_t iq_queue;
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static int8_t iq_queue_buffer[IQ_QUEUE_LEN][IQ_BLOCK_LEN];
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static size_t iq_queue_pos = 0;
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static int slice, chan;
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static void bias_set_delay(int delay)
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{
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gpio_disable_pulls(RX_PIN);
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pio_gpio_init(PIO, RX_PIN);
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delay += 200;
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if (delay < 0)
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delay = 0;
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if (delay >= 200)
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delay = 512;
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int bulk = delay / 16;
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int rest = delay % 16;
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if (0 == rest) {
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bulk -= 1;
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rest = 16;
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}
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if (delay > 0) {
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if (bulk) {
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pio1->instr_mem[11] = pio_encode_set(pio_x, bulk) |
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pio_encode_sideset(1, 0) | pio_encode_delay(rest - 1);
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} else {
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pio1->instr_mem[11] = pio_encode_jmp(10) | pio_encode_sideset(1, 0) |
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pio_encode_delay(rest - 1);
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}
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pio_sm_set_wrap(pio1, 0, 10, 12);
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} else {
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pio_sm_set_wrap(pio1, 0, 10, 10);
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pio_sm_exec(pio1, 0, pio_encode_jmp(10));
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}
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}
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static void bias_init(int in_pin, int out_pin)
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{
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gpio_disable_pulls(in_pin);
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gpio_disable_pulls(out_pin);
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pio_gpio_init(pio1, out_pin);
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gpio_set_input_hysteresis_enabled(in_pin, false);
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gpio_set_drive_strength(out_pin, GPIO_DRIVE_STRENGTH_2MA);
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gpio_set_slew_rate(out_pin, GPIO_SLEW_RATE_SLOW);
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const uint16_t insn[] = {
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pio_encode_in(pio_pins, 1) | pio_encode_delay(0),
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pio_encode_mov_not(pio_pins, pio_pins) | pio_encode_sideset(1, 1),
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pio_encode_set(pio_x, 31) | pio_encode_sideset(1, 0) | pio_encode_delay(15),
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pio_encode_jmp_x_dec(2) | pio_encode_sideset(1, 0) | pio_encode_delay(15),
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};
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pio_program_t prog = {
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.instructions = insn,
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.length = sizeof(insn) / sizeof(*insn),
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.origin = origin_rx,
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.origin = 10,
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};
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if (pio_can_add_program(PIO, &prog))
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origin_rx = pio_add_program(PIO, &prog);
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pio_sm_set_enabled(pio1, 0, false);
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pio_sm_restart(pio1, 0);
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pio_sm_clear_fifos(pio1, 0);
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if (pio_can_add_program(pio1, &prog))
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pio_add_program(pio1, &prog);
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pio_sm_config pc = pio_get_default_sm_config();
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sm_config_set_in_pins(&pc, RX_PIN);
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sm_config_set_wrap(&pc, origin_rx, origin_rx + prog.length - 1);
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sm_config_set_sideset(&pc, 1, false, true);
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sm_config_set_sideset_pins(&pc, out_pin);
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sm_config_set_in_pins(&pc, in_pin);
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sm_config_set_out_pins(&pc, out_pin, 1);
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sm_config_set_set_pins(&pc, out_pin, 1);
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sm_config_set_wrap(&pc, prog.origin, prog.origin + prog.length - 1);
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sm_config_set_clkdiv_int_frac(&pc, 1, 0);
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pio_sm_init(pio1, 0, prog.origin, &pc);
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pio_sm_set_consecutive_pindirs(pio1, 0, out_pin, 1, GPIO_OUT);
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pio_sm_set_enabled(pio1, 0, true);
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}
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static void watch_init(int in_pin)
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{
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const uint16_t insn[] = {
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pio_encode_in(pio_pins, 1),
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};
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pio_program_t prog = {
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.instructions = insn,
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.length = 1,
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.origin = 6,
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};
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pio_sm_set_enabled(pio1, 1, false);
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pio_sm_restart(pio1, 1);
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pio_sm_clear_fifos(pio1, 1);
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if (pio_can_add_program(pio1, &prog))
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pio_add_program(pio1, &prog);
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pio_sm_config pc = pio_get_default_sm_config();
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sm_config_set_in_pins(&pc, in_pin);
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sm_config_set_wrap(&pc, prog.origin, prog.origin + prog.length - 1);
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sm_config_set_clkdiv_int_frac(&pc, 1, 0);
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sm_config_set_fifo_join(&pc, PIO_FIFO_JOIN_RX);
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sm_config_set_in_shift(&pc, false, true, 32);
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pio_sm_init(PIO, SM_RX, origin_rx, &pc);
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pio_sm_init(pio1, 1, prog.origin, &pc);
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pio_sm_set_consecutive_pindirs(PIO, SM_RX, RX_PIN, 1, GPIO_IN);
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pio_sm_set_enabled(pio1, 1, true);
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}
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static void init_bias()
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static void adder_init()
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{
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gpio_disable_pulls(RX_PIN);
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gpio_disable_pulls(FB_PIN);
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pio_gpio_init(PIO, FB_PIN);
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gpio_set_input_hysteresis_enabled(RX_PIN, false);
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gpio_set_drive_strength(FB_PIN, GPIO_DRIVE_STRENGTH_2MA);
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gpio_set_slew_rate(FB_PIN, GPIO_SLEW_RATE_SLOW);
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PIO->input_sync_bypass = 1u << RX_PIN;
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const uint16_t insn[] = {
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pio_encode_mov(pio_isr, pio_null),
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pio_encode_in(pio_y, 4),
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pio_encode_in(pio_pins, 1) | pio_encode_delay(15),
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pio_encode_in(pio_pins, 1) | pio_encode_delay(15),
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pio_encode_jmp_y_dec(1),
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pio_encode_out(pio_pc, 2),
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pio_encode_out(pio_pc, 2),
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pio_encode_jmp_x_dec(2),
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pio_encode_mov(pio_y, pio_isr),
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pio_encode_mov(pio_x, pio_isr),
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pio_encode_jmp_x_dec(6),
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pio_encode_mov_not(pio_pins, pio_pins) | pio_encode_sideset(1, 1),
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/* Avoid Y-- on wrap. */
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pio_encode_out(pio_pc, 2),
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};
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pio_program_t prog = {
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.instructions = insn,
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.length = sizeof(insn) / sizeof(*insn),
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.origin = origin_bias,
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.origin = 0,
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};
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if (pio_can_add_program(PIO, &prog))
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origin_bias = pio_add_program(PIO, &prog);
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pio_sm_set_enabled(pio1, 2, false);
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pio_sm_set_enabled(pio1, 3, false);
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pio_sm_restart(pio1, 2);
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pio_sm_restart(pio1, 3);
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pio_sm_clear_fifos(pio1, 2);
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pio_sm_clear_fifos(pio1, 3);
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if (pio_can_add_program(pio1, &prog))
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pio_add_program(pio1, &prog);
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pio_sm_config pc = pio_get_default_sm_config();
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sm_config_set_in_shift(&pc, false, false, 32);
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sm_config_set_sideset(&pc, 1, false, true);
|
|
|
|
|
sm_config_set_sideset_pins(&pc, FB_PIN);
|
|
|
|
|
sm_config_set_in_pins(&pc, RX_PIN);
|
|
|
|
|
sm_config_set_out_pins(&pc, FB_PIN, 1);
|
|
|
|
|
sm_config_set_set_pins(&pc, RX_PIN, 1);
|
|
|
|
|
|
|
|
|
|
sm_config_set_wrap(&pc, origin_bias, origin_bias + prog.length - 1);
|
|
|
|
|
|
|
|
|
|
sm_config_set_clkdiv_int_frac(&pc, 1, 0);
|
|
|
|
|
pio_sm_init(PIO, SM_BIAS, origin_bias, &pc);
|
|
|
|
|
|
|
|
|
|
pio_sm_exec_wait_blocking(PIO, SM_BIAS, pio_encode_set(pio_y, 31));
|
|
|
|
|
pio_sm_set_consecutive_pindirs(PIO, SM_BIAS, FB_PIN, 1, GPIO_OUT);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static const uint32_t samp_insn = 16;
|
|
|
|
|
|
|
|
|
|
static void init_adder()
|
|
|
|
|
{
|
|
|
|
|
const uint16_t insn[] = {
|
|
|
|
|
pio_encode_out(pio_pc, 4), // 0000 +0
|
|
|
|
|
pio_encode_jmp_x_dec(0), // 0001 +1
|
|
|
|
|
pio_encode_jmp_x_dec(0), // 0010 +1
|
|
|
|
|
pio_encode_jmp_y_dec(0), // 0011 +2
|
|
|
|
|
pio_encode_jmp_x_dec(0), // 0100 +1
|
|
|
|
|
pio_encode_jmp_y_dec(0), // 0101 +2
|
|
|
|
|
pio_encode_jmp_y_dec(0), // 0110 +2
|
|
|
|
|
pio_encode_jmp_y_dec(1), // 0111 +2 +1
|
|
|
|
|
pio_encode_jmp_x_dec(0), // 1000 +1
|
|
|
|
|
pio_encode_jmp_y_dec(0), // 1001 +2
|
|
|
|
|
pio_encode_jmp_y_dec(0), // 1010 +2
|
|
|
|
|
pio_encode_jmp_y_dec(1), // 1011 +2 +1
|
|
|
|
|
pio_encode_jmp_y_dec(0), // 1100 +2
|
|
|
|
|
pio_encode_jmp_y_dec(1), // 1101 +2 +1
|
|
|
|
|
pio_encode_jmp_y_dec(1), // 1110 +2 +1
|
|
|
|
|
pio_encode_jmp_y_dec(3), // 1111 +2 +2
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Should wrap here.
|
|
|
|
|
* Jump to this portion must be inserted from the outside.
|
|
|
|
|
*/
|
|
|
|
|
pio_encode_in(pio_y, 32),
|
|
|
|
|
pio_encode_in(pio_x, 32),
|
|
|
|
|
pio_encode_set(pio_y, 0),
|
|
|
|
|
pio_encode_set(pio_x, 0),
|
|
|
|
|
//pio_encode_jmp_y_dec(21),
|
|
|
|
|
//pio_encode_jmp_x_dec(22),
|
|
|
|
|
pio_encode_out(pio_pc, 4),
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
pio_program_t prog = {
|
|
|
|
|
.instructions = insn,
|
|
|
|
|
.length = sizeof(insn) / sizeof(*insn),
|
|
|
|
|
.origin = origin_adder,
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
if (pio_can_add_program(PIO, &prog))
|
|
|
|
|
origin_adder = pio_add_program(PIO, &prog);
|
|
|
|
|
|
|
|
|
|
pio_sm_config pc = pio_get_default_sm_config();
|
|
|
|
|
sm_config_set_wrap(&pc, origin_adder, origin_adder + 15);
|
|
|
|
|
sm_config_set_wrap(&pc, prog.origin, prog.origin + prog.length - 1);
|
|
|
|
|
sm_config_set_clkdiv_int_frac(&pc, 1, 0);
|
|
|
|
|
sm_config_set_in_shift(&pc, false, true, 32);
|
|
|
|
|
sm_config_set_out_shift(&pc, false, true, 32);
|
|
|
|
|
pio_sm_init(pio1, 2, prog.origin + prog.length - 1, &pc);
|
|
|
|
|
pio_sm_init(pio1, 3, prog.origin + prog.length - 1, &pc);
|
|
|
|
|
|
|
|
|
|
pio_sm_init(PIO, SM_COS, origin_adder, &pc);
|
|
|
|
|
pio_sm_init(PIO, SM_SIN, origin_adder, &pc);
|
|
|
|
|
pio_sm_set_enabled(pio1, 2, true);
|
|
|
|
|
pio_sm_set_enabled(pio1, 3, true);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
#define STEP_BASE ((UINT_MAX + 1.0) / CLK_SYS_HZ)
|
|
|
|
|
|
|
|
|
|
static void lo_generate_phase(uint32_t *buf, size_t len, uint32_t step, uint32_t phase)
|
|
|
|
|
static void lo_generate(uint32_t *buf, double freq, uint32_t phase)
|
|
|
|
|
{
|
|
|
|
|
for (size_t i = 0; i < len; i++) {
|
|
|
|
|
uint32_t bits = 0;
|
|
|
|
|
static const double base = (UINT_MAX + 1.0) / CLK_SYS_HZ;
|
|
|
|
|
|
|
|
|
|
uint32_t step = base * freq;
|
|
|
|
|
|
|
|
|
|
for (size_t i = 0; i < LO_WORDS; i++) {
|
|
|
|
|
unsigned bits = 0;
|
|
|
|
|
|
|
|
|
|
for (int j = 0; j < 32; j++) {
|
|
|
|
|
bits |= phase >> 31;
|
|
|
|
|
@ -255,19 +271,27 @@ static void lo_generate_phase(uint32_t *buf, size_t len, uint32_t step, uint32_t
|
|
|
|
|
|
|
|
|
|
static void rx_lo_init(double req_freq, bool align)
|
|
|
|
|
{
|
|
|
|
|
const double step_hz = (double)CLK_SYS_HZ / ((8 << LO_BITS_DEPTH) / 2.0);
|
|
|
|
|
const double step_hz = (double)CLK_SYS_HZ / (4 << LO_BITS_DEPTH);
|
|
|
|
|
double freq = req_freq;
|
|
|
|
|
|
|
|
|
|
if (align)
|
|
|
|
|
freq = round(freq / step_hz) * step_hz;
|
|
|
|
|
|
|
|
|
|
uint32_t step = STEP_BASE * freq;
|
|
|
|
|
|
|
|
|
|
lo_generate_phase(lo_cos, LO_WORDS, step, COS_PHASE);
|
|
|
|
|
lo_generate_phase(lo_sin, LO_WORDS, step, SIN_PHASE);
|
|
|
|
|
lo_generate(lo_cos, freq, COS_PHASE);
|
|
|
|
|
lo_generate(lo_sin, freq, SIN_PHASE);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void rf_rx_start()
|
|
|
|
|
static const uint32_t samp_insn[4] __attribute__((__aligned__(16)));
|
|
|
|
|
static const uint32_t samp_insn[4] = {
|
|
|
|
|
0x4040, /* IN Y, 32 */
|
|
|
|
|
0x4020, /* IN X, 32 */
|
|
|
|
|
0xe040, /* SET Y, 0 */
|
|
|
|
|
0xe020, /* SET X, 0 */
|
|
|
|
|
};
|
|
|
|
|
|
|
|
|
|
static uint32_t null, one = 1;
|
|
|
|
|
|
|
|
|
|
static void rf_rx_start(int rx_pin, int bias_pin)
|
|
|
|
|
{
|
|
|
|
|
dma_ch_rx = dma_claim_unused_channel(true);
|
|
|
|
|
dma_ch_cp = dma_claim_unused_channel(true);
|
|
|
|
|
@ -278,6 +302,12 @@ static void rf_rx_start()
|
|
|
|
|
|
|
|
|
|
dma_ch_samp_cos = dma_claim_unused_channel(true);
|
|
|
|
|
dma_ch_samp_sin = dma_claim_unused_channel(true);
|
|
|
|
|
dma_ch_samp_trig = dma_claim_unused_channel(true);
|
|
|
|
|
|
|
|
|
|
dma_ch_aout = dma_claim_unused_channel(true);
|
|
|
|
|
|
|
|
|
|
dma_t_samp = dma_claim_unused_timer(true);
|
|
|
|
|
dma_t_aout = dma_claim_unused_timer(true);
|
|
|
|
|
|
|
|
|
|
dma_channel_config dma_conf;
|
|
|
|
|
|
|
|
|
|
@ -286,9 +316,9 @@ static void rf_rx_start()
|
|
|
|
|
channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
|
|
|
|
|
channel_config_set_read_increment(&dma_conf, false);
|
|
|
|
|
channel_config_set_write_increment(&dma_conf, false);
|
|
|
|
|
channel_config_set_dreq(&dma_conf, pio_get_dreq(PIO, SM_RX, false));
|
|
|
|
|
channel_config_set_dreq(&dma_conf, pio_get_dreq(pio1, 1, false));
|
|
|
|
|
channel_config_set_chain_to(&dma_conf, dma_ch_cp);
|
|
|
|
|
dma_channel_configure(dma_ch_rx, &dma_conf, LO_COS_ACCUMULATOR, &PIO->rxf[SM_RX], 1, false);
|
|
|
|
|
dma_channel_configure(dma_ch_rx, &dma_conf, LO_COS_ACCUMULATOR, &pio1->rxf[1], 1, false);
|
|
|
|
|
|
|
|
|
|
/* Copy accumulator I to accumulator Q. */
|
|
|
|
|
dma_conf = dma_channel_get_default_config(dma_ch_cp);
|
|
|
|
|
@ -324,9 +354,9 @@ static void rf_rx_start()
|
|
|
|
|
channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
|
|
|
|
|
channel_config_set_read_increment(&dma_conf, false);
|
|
|
|
|
channel_config_set_write_increment(&dma_conf, false);
|
|
|
|
|
channel_config_set_dreq(&dma_conf, pio_get_dreq(PIO, SM_COS, true));
|
|
|
|
|
channel_config_set_dreq(&dma_conf, pio_get_dreq(pio1, 2, true));
|
|
|
|
|
channel_config_set_chain_to(&dma_conf, dma_ch_pio_sin);
|
|
|
|
|
dma_channel_configure(dma_ch_pio_cos, &dma_conf, &PIO->txf[SM_COS], LO_COS_ACCUMULATOR, 1,
|
|
|
|
|
dma_channel_configure(dma_ch_pio_cos, &dma_conf, &pio1->txf[2], LO_COS_ACCUMULATOR, 1,
|
|
|
|
|
false);
|
|
|
|
|
|
|
|
|
|
/* Copy mixed Q accumulator to PIO adder Q. */
|
|
|
|
|
@ -334,67 +364,84 @@ static void rf_rx_start()
|
|
|
|
|
channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
|
|
|
|
|
channel_config_set_read_increment(&dma_conf, false);
|
|
|
|
|
channel_config_set_write_increment(&dma_conf, false);
|
|
|
|
|
channel_config_set_dreq(&dma_conf, pio_get_dreq(PIO, SM_SIN, true));
|
|
|
|
|
channel_config_set_dreq(&dma_conf, pio_get_dreq(pio1, 3, true));
|
|
|
|
|
channel_config_set_chain_to(&dma_conf, dma_ch_rx);
|
|
|
|
|
dma_channel_configure(dma_ch_pio_sin, &dma_conf, &PIO->txf[SM_SIN], LO_SIN_ACCUMULATOR, 1,
|
|
|
|
|
dma_channel_configure(dma_ch_pio_sin, &dma_conf, &pio1->txf[3], LO_SIN_ACCUMULATOR, 1,
|
|
|
|
|
false);
|
|
|
|
|
|
|
|
|
|
/* Trigger I accumulator values push. */
|
|
|
|
|
dma_conf = dma_channel_get_default_config(dma_ch_samp_cos);
|
|
|
|
|
/* Pacing timer for the sampling script trigger channel. */
|
|
|
|
|
dma_timer_set_fraction(dma_t_samp, 1, CLK_SYS_HZ / (sample_rate * DECIMATE));
|
|
|
|
|
|
|
|
|
|
/* Sampling trigger channel. */
|
|
|
|
|
dma_conf = dma_channel_get_default_config(dma_ch_samp_trig);
|
|
|
|
|
channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
|
|
|
|
|
channel_config_set_read_increment(&dma_conf, false);
|
|
|
|
|
channel_config_set_write_increment(&dma_conf, false);
|
|
|
|
|
channel_config_set_dreq(&dma_conf, dma_get_timer_dreq(dma_t_samp));
|
|
|
|
|
channel_config_set_high_priority(&dma_conf, true);
|
|
|
|
|
channel_config_set_chain_to(&dma_conf, dma_ch_samp_cos);
|
|
|
|
|
dma_channel_configure(dma_ch_samp_trig, &dma_conf, &null, &one, 1, false);
|
|
|
|
|
|
|
|
|
|
/* Trigger I accumulator values push. */
|
|
|
|
|
dma_conf = dma_channel_get_default_config(dma_ch_samp_cos);
|
|
|
|
|
channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
|
|
|
|
|
channel_config_set_read_increment(&dma_conf, true);
|
|
|
|
|
channel_config_set_write_increment(&dma_conf, false);
|
|
|
|
|
channel_config_set_ring(&dma_conf, false, 4);
|
|
|
|
|
channel_config_set_high_priority(&dma_conf, true);
|
|
|
|
|
channel_config_set_chain_to(&dma_conf, dma_ch_samp_sin);
|
|
|
|
|
dma_channel_configure(dma_ch_samp_cos, &dma_conf, &PIO->sm[SM_COS].instr, &samp_insn, 1,
|
|
|
|
|
false);
|
|
|
|
|
dma_channel_configure(dma_ch_samp_cos, &dma_conf, &pio1->sm[2].instr, samp_insn, 4, false);
|
|
|
|
|
|
|
|
|
|
/* Trigger Q accumulator values push. */
|
|
|
|
|
dma_conf = dma_channel_get_default_config(dma_ch_samp_sin);
|
|
|
|
|
channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
|
|
|
|
|
channel_config_set_read_increment(&dma_conf, false);
|
|
|
|
|
channel_config_set_read_increment(&dma_conf, true);
|
|
|
|
|
channel_config_set_write_increment(&dma_conf, false);
|
|
|
|
|
channel_config_set_ring(&dma_conf, false, 4);
|
|
|
|
|
channel_config_set_high_priority(&dma_conf, true);
|
|
|
|
|
channel_config_set_chain_to(&dma_conf, dma_ch_samp_cos);
|
|
|
|
|
dma_channel_configure(dma_ch_samp_sin, &dma_conf, &PIO->sm[SM_SIN].instr, &samp_insn, 1,
|
|
|
|
|
channel_config_set_chain_to(&dma_conf, dma_ch_samp_trig);
|
|
|
|
|
dma_channel_configure(dma_ch_samp_sin, &dma_conf, &pio1->sm[3].instr, samp_insn, 4, false);
|
|
|
|
|
|
|
|
|
|
/* Pacing timer for the audio output. */
|
|
|
|
|
dma_timer_set_fraction(dma_t_aout, 1, CLK_SYS_HZ / 200000);
|
|
|
|
|
|
|
|
|
|
dma_conf = dma_channel_get_default_config(dma_ch_aout);
|
|
|
|
|
channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_16);
|
|
|
|
|
channel_config_set_read_increment(&dma_conf, true);
|
|
|
|
|
channel_config_set_write_increment(&dma_conf, false);
|
|
|
|
|
channel_config_set_ring(&dma_conf, false, AOUT_BITS_DEPTH);
|
|
|
|
|
channel_config_set_dreq(&dma_conf, dma_get_timer_dreq(dma_t_aout));
|
|
|
|
|
dma_channel_configure(dma_ch_aout, &dma_conf, &pwm_hw->slice[slice].cc, aout_buf, UINT_MAX,
|
|
|
|
|
false);
|
|
|
|
|
|
|
|
|
|
init_bias();
|
|
|
|
|
init_adder();
|
|
|
|
|
init_rx();
|
|
|
|
|
bias_init(rx_pin, bias_pin);
|
|
|
|
|
adder_init();
|
|
|
|
|
|
|
|
|
|
dma_channel_start(dma_ch_rx);
|
|
|
|
|
dma_channel_start(dma_ch_samp_cos);
|
|
|
|
|
|
|
|
|
|
pio_set_sm_mask_enabled(PIO, 0x0f, true);
|
|
|
|
|
dma_channel_start(dma_ch_samp_trig);
|
|
|
|
|
dma_channel_start(dma_ch_aout);
|
|
|
|
|
watch_init(rx_pin);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void rf_rx_stop(void)
|
|
|
|
|
{
|
|
|
|
|
pio_set_sm_mask_enabled(PIO, 0x0f, false);
|
|
|
|
|
pio_sm_set_enabled(pio1, 0, false);
|
|
|
|
|
pio_sm_set_enabled(pio1, 1, false);
|
|
|
|
|
pio_sm_set_enabled(pio1, 2, false);
|
|
|
|
|
pio_sm_set_enabled(pio1, 3, false);
|
|
|
|
|
|
|
|
|
|
pio_sm_restart(PIO, 0);
|
|
|
|
|
pio_sm_restart(PIO, 1);
|
|
|
|
|
pio_sm_restart(PIO, 2);
|
|
|
|
|
pio_sm_restart(PIO, 3);
|
|
|
|
|
pio_sm_restart(pio1, 0);
|
|
|
|
|
pio_sm_restart(pio1, 1);
|
|
|
|
|
pio_sm_restart(pio1, 2);
|
|
|
|
|
pio_sm_restart(pio1, 3);
|
|
|
|
|
|
|
|
|
|
pio_sm_clear_fifos(PIO, 0);
|
|
|
|
|
pio_sm_clear_fifos(PIO, 1);
|
|
|
|
|
pio_sm_clear_fifos(PIO, 2);
|
|
|
|
|
pio_sm_clear_fifos(PIO, 3);
|
|
|
|
|
pio_sm_clear_fifos(pio1, 0);
|
|
|
|
|
pio_sm_clear_fifos(pio1, 1);
|
|
|
|
|
pio_sm_clear_fifos(pio1, 2);
|
|
|
|
|
pio_sm_clear_fifos(pio1, 3);
|
|
|
|
|
|
|
|
|
|
sleep_us(10);
|
|
|
|
|
|
|
|
|
|
dma_channel_clear_chain_to(dma_ch_rx);
|
|
|
|
|
dma_channel_clear_chain_to(dma_ch_cp);
|
|
|
|
|
dma_channel_clear_chain_to(dma_ch_cos);
|
|
|
|
|
dma_channel_clear_chain_to(dma_ch_sin);
|
|
|
|
|
dma_channel_clear_chain_to(dma_ch_pio_cos);
|
|
|
|
|
dma_channel_clear_chain_to(dma_ch_pio_sin);
|
|
|
|
|
dma_channel_clear_chain_to(dma_ch_samp_cos);
|
|
|
|
|
dma_channel_clear_chain_to(dma_ch_samp_sin);
|
|
|
|
|
|
|
|
|
|
dma_channel_abort(dma_ch_rx);
|
|
|
|
|
dma_channel_abort(dma_ch_cp);
|
|
|
|
|
dma_channel_abort(dma_ch_cos);
|
|
|
|
|
@ -403,6 +450,8 @@ static void rf_rx_stop(void)
|
|
|
|
|
dma_channel_abort(dma_ch_pio_sin);
|
|
|
|
|
dma_channel_abort(dma_ch_samp_cos);
|
|
|
|
|
dma_channel_abort(dma_ch_samp_sin);
|
|
|
|
|
dma_channel_abort(dma_ch_samp_trig);
|
|
|
|
|
dma_channel_abort(dma_ch_aout);
|
|
|
|
|
|
|
|
|
|
dma_channel_cleanup(dma_ch_rx);
|
|
|
|
|
dma_channel_cleanup(dma_ch_cp);
|
|
|
|
|
@ -412,6 +461,8 @@ static void rf_rx_stop(void)
|
|
|
|
|
dma_channel_cleanup(dma_ch_pio_sin);
|
|
|
|
|
dma_channel_cleanup(dma_ch_samp_cos);
|
|
|
|
|
dma_channel_cleanup(dma_ch_samp_sin);
|
|
|
|
|
dma_channel_cleanup(dma_ch_samp_trig);
|
|
|
|
|
dma_channel_cleanup(dma_ch_aout);
|
|
|
|
|
|
|
|
|
|
dma_channel_unclaim(dma_ch_rx);
|
|
|
|
|
dma_channel_unclaim(dma_ch_cp);
|
|
|
|
|
@ -421,6 +472,11 @@ static void rf_rx_stop(void)
|
|
|
|
|
dma_channel_unclaim(dma_ch_pio_sin);
|
|
|
|
|
dma_channel_unclaim(dma_ch_samp_cos);
|
|
|
|
|
dma_channel_unclaim(dma_ch_samp_sin);
|
|
|
|
|
dma_channel_unclaim(dma_ch_samp_trig);
|
|
|
|
|
dma_channel_unclaim(dma_ch_aout);
|
|
|
|
|
|
|
|
|
|
dma_timer_unclaim(dma_t_samp);
|
|
|
|
|
dma_timer_unclaim(dma_t_aout);
|
|
|
|
|
|
|
|
|
|
dma_ch_rx = -1;
|
|
|
|
|
dma_ch_cp = -1;
|
|
|
|
|
@ -430,46 +486,18 @@ static void rf_rx_stop(void)
|
|
|
|
|
dma_ch_pio_sin = -1;
|
|
|
|
|
dma_ch_samp_cos = -1;
|
|
|
|
|
dma_ch_samp_sin = -1;
|
|
|
|
|
}
|
|
|
|
|
dma_ch_samp_trig = -1;
|
|
|
|
|
dma_ch_aout = -1;
|
|
|
|
|
|
|
|
|
|
inline static uint32_t pio_sm_get_blocking_unsafe(pio_hw_t *pio, int sm)
|
|
|
|
|
{
|
|
|
|
|
while (pio->fstat & (1u << (PIO_FSTAT_RXEMPTY_LSB + sm)))
|
|
|
|
|
asm volatile("nop");
|
|
|
|
|
|
|
|
|
|
return pio->rxf[sm];
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
inline static int nextI()
|
|
|
|
|
{
|
|
|
|
|
static int prevI = 0;
|
|
|
|
|
|
|
|
|
|
int sI = 0;
|
|
|
|
|
sI -= 2 * pio_sm_get_blocking_unsafe(PIO, SM_COS);
|
|
|
|
|
sI -= pio_sm_get_blocking_unsafe(PIO, SM_COS);
|
|
|
|
|
|
|
|
|
|
int I = sI - prevI;
|
|
|
|
|
prevI = sI;
|
|
|
|
|
|
|
|
|
|
return I;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
inline static int nextQ()
|
|
|
|
|
{
|
|
|
|
|
static int prevQ = 0;
|
|
|
|
|
|
|
|
|
|
int sQ = 0;
|
|
|
|
|
sQ -= 2 * pio_sm_get_blocking_unsafe(PIO, SM_SIN);
|
|
|
|
|
sQ -= pio_sm_get_blocking_unsafe(PIO, SM_SIN);
|
|
|
|
|
|
|
|
|
|
int Q = sQ - prevQ;
|
|
|
|
|
prevQ = sQ;
|
|
|
|
|
|
|
|
|
|
return Q;
|
|
|
|
|
dma_t_samp = -1;
|
|
|
|
|
dma_t_aout = -1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void rf_rx(void)
|
|
|
|
|
{
|
|
|
|
|
const uint32_t base = (uint32_t)rx_cos;
|
|
|
|
|
int pos = 0;
|
|
|
|
|
|
|
|
|
|
while (true) {
|
|
|
|
|
if (multicore_fifo_rvalid()) {
|
|
|
|
|
multicore_fifo_pop_blocking();
|
|
|
|
|
@ -477,25 +505,81 @@ static void rf_rx(void)
|
|
|
|
|
return;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
uint8_t *block = iq_queue_buffer[iq_queue_pos];
|
|
|
|
|
uint8_t *blockptr = block;
|
|
|
|
|
int head = (dma_hw->ch[dma_ch_in_cos].write_addr - base) / 4;
|
|
|
|
|
int delta = (head < pos ? head + RX_WORDS : head) - pos;
|
|
|
|
|
|
|
|
|
|
while (delta < RX_STRIDE) {
|
|
|
|
|
sleep_us(1);
|
|
|
|
|
head = (dma_hw->ch[dma_ch_in_cos].write_addr - base) / 4;
|
|
|
|
|
delta = (head < pos ? head + RX_WORDS : head) - pos;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
const uint32_t *cos_ptr = rx_cos + pos;
|
|
|
|
|
const uint32_t *sin_ptr = rx_sin + pos;
|
|
|
|
|
|
|
|
|
|
pos = (pos + RX_STRIDE) & (RX_WORDS - 1);
|
|
|
|
|
|
|
|
|
|
int8_t *block = iq_queue_buffer[iq_queue_pos];
|
|
|
|
|
int8_t *blockptr = block;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Since every 2 samples add to either +1 or -1,
|
|
|
|
|
* the maximum amplitude in one direction is 1/2.
|
|
|
|
|
*/
|
|
|
|
|
int64_t max_amplitude = CLK_SYS_HZ / 2;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* Since the waveform is normally half of the time
|
|
|
|
|
* above zero, we can halve once more.
|
|
|
|
|
*
|
|
|
|
|
* This is not perfect, so we do not max out the base
|
|
|
|
|
* gain but keep it slightly below the maximum to make
|
|
|
|
|
* sure we do not overshoot often.
|
|
|
|
|
*/
|
|
|
|
|
max_amplitude /= 2;
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
|
* We are allowing the counters to only go as high
|
|
|
|
|
* as sampling rate.
|
|
|
|
|
*/
|
|
|
|
|
max_amplitude /= sample_rate;
|
|
|
|
|
|
|
|
|
|
for (int i = 0; i < IQ_SAMPLES; i++) {
|
|
|
|
|
int I = 0, Q = 0;
|
|
|
|
|
int sI = 0, sQ = 0;
|
|
|
|
|
|
|
|
|
|
Q += nextQ();
|
|
|
|
|
I += nextI();
|
|
|
|
|
/*
|
|
|
|
|
* I: +I1 -I3 +Q2 -Q4
|
|
|
|
|
* Q: +Q1 -Q3 -I2 +I4
|
|
|
|
|
*/
|
|
|
|
|
sI += *cos_ptr++;
|
|
|
|
|
sI -= *cos_ptr++;
|
|
|
|
|
|
|
|
|
|
I -= nextQ();
|
|
|
|
|
Q += nextI();
|
|
|
|
|
sQ -= *cos_ptr++;
|
|
|
|
|
sQ += *cos_ptr++;
|
|
|
|
|
|
|
|
|
|
Q -= nextQ();
|
|
|
|
|
I -= nextI();
|
|
|
|
|
sI -= *cos_ptr++;
|
|
|
|
|
sI += *cos_ptr++;
|
|
|
|
|
|
|
|
|
|
I += nextQ();
|
|
|
|
|
Q -= nextI();
|
|
|
|
|
sQ += *cos_ptr++;
|
|
|
|
|
sQ -= *cos_ptr++;
|
|
|
|
|
|
|
|
|
|
sQ += *sin_ptr++;
|
|
|
|
|
sQ -= *sin_ptr++;
|
|
|
|
|
|
|
|
|
|
sI += *sin_ptr++;
|
|
|
|
|
sI -= *sin_ptr++;
|
|
|
|
|
|
|
|
|
|
sQ -= *sin_ptr++;
|
|
|
|
|
sQ += *sin_ptr++;
|
|
|
|
|
|
|
|
|
|
sI -= *sin_ptr++;
|
|
|
|
|
sI += *sin_ptr++;
|
|
|
|
|
|
|
|
|
|
int64_t I = sI;
|
|
|
|
|
int64_t Q = sQ;
|
|
|
|
|
|
|
|
|
|
I *= gain;
|
|
|
|
|
I -= (max_amplitude * 181) / 256;
|
|
|
|
|
I /= max_amplitude;
|
|
|
|
|
|
|
|
|
|
if (I > 127)
|
|
|
|
|
@ -503,9 +587,10 @@ static void rf_rx(void)
|
|
|
|
|
else if (I < -128)
|
|
|
|
|
I = -128;
|
|
|
|
|
|
|
|
|
|
*blockptr++ = (uint8_t)I + 128;
|
|
|
|
|
*blockptr++ = I;
|
|
|
|
|
|
|
|
|
|
Q *= gain;
|
|
|
|
|
Q -= (max_amplitude * 181) / 256;
|
|
|
|
|
Q /= max_amplitude;
|
|
|
|
|
|
|
|
|
|
if (Q > 127)
|
|
|
|
|
@ -513,7 +598,7 @@ static void rf_rx(void)
|
|
|
|
|
else if (Q < -128)
|
|
|
|
|
Q = -128;
|
|
|
|
|
|
|
|
|
|
*blockptr++ = (uint8_t)Q + 128;
|
|
|
|
|
*blockptr++ = Q;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
if (queue_try_add(&iq_queue, &block)) {
|
|
|
|
|
@ -526,21 +611,23 @@ static void run_command(uint8_t cmd, uint32_t arg)
|
|
|
|
|
{
|
|
|
|
|
if (0x01 == cmd) {
|
|
|
|
|
/* Tune to a new center frequency */
|
|
|
|
|
frequency = arg;
|
|
|
|
|
rx_lo_init(frequency + sample_rate, true);
|
|
|
|
|
rx_lo_init(arg - sample_rate, true);
|
|
|
|
|
} else if (0x02 == cmd) {
|
|
|
|
|
/* Set the rate at which IQ sample pairs are sent */
|
|
|
|
|
sample_rate = arg;
|
|
|
|
|
max_amplitude = CLK_SYS_HZ / sample_rate / 2;
|
|
|
|
|
dma_timer_set_fraction(dma_t_samp, 1, CLK_SYS_HZ / (sample_rate * DECIMATE));
|
|
|
|
|
rx_lo_init(frequency + sample_rate, true);
|
|
|
|
|
rx_lo_init(arg - sample_rate, true);
|
|
|
|
|
} else if (0x04 == cmd) {
|
|
|
|
|
/* Set the tuner gain level */
|
|
|
|
|
gain = INIT_GAIN * pow(10.0, arg / 200.0);
|
|
|
|
|
gain = INIT_GAIN * powf(10.0f, 0.005f * arg);
|
|
|
|
|
} else if (0x05 == cmd) {
|
|
|
|
|
/* Set PPM error - hack to tweak bias strength */
|
|
|
|
|
bias_set_delay(arg);
|
|
|
|
|
} else if (0x0d == cmd) {
|
|
|
|
|
/* Set tuner gain by the tuner's gain index */
|
|
|
|
|
if (arg <= NUM_GAINS)
|
|
|
|
|
gain = INIT_GAIN * pow(10.0, gains[arg] / 200.0);
|
|
|
|
|
if (arg < NUM_GAINS) {
|
|
|
|
|
gain = INIT_GAIN * powf(10.0f, 0.005f * gains[arg]);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
@ -568,17 +655,47 @@ static int check_command(void)
|
|
|
|
|
return -1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
static void do_rx()
|
|
|
|
|
static void do_rx(int rx_pin, int bias_pin)
|
|
|
|
|
{
|
|
|
|
|
const uint8_t *block;
|
|
|
|
|
rf_rx_start(rx_pin, bias_pin);
|
|
|
|
|
sleep_us(100);
|
|
|
|
|
|
|
|
|
|
dma_ch_in_cos = dma_claim_unused_channel(true);
|
|
|
|
|
dma_ch_in_sin = dma_claim_unused_channel(true);
|
|
|
|
|
|
|
|
|
|
dma_channel_config dma_conf;
|
|
|
|
|
|
|
|
|
|
dma_conf = dma_channel_get_default_config(dma_ch_in_cos);
|
|
|
|
|
channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
|
|
|
|
|
channel_config_set_read_increment(&dma_conf, false);
|
|
|
|
|
channel_config_set_write_increment(&dma_conf, true);
|
|
|
|
|
channel_config_set_ring(&dma_conf, true, RX_BITS_DEPTH);
|
|
|
|
|
channel_config_set_dreq(&dma_conf, pio_get_dreq(pio1, 2, false));
|
|
|
|
|
channel_config_set_chain_to(&dma_conf, dma_ch_in_sin);
|
|
|
|
|
dma_channel_configure(dma_ch_in_cos, &dma_conf, rx_cos, &pio1->rxf[2], 2, false);
|
|
|
|
|
|
|
|
|
|
dma_conf = dma_channel_get_default_config(dma_ch_in_sin);
|
|
|
|
|
channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
|
|
|
|
|
channel_config_set_read_increment(&dma_conf, false);
|
|
|
|
|
channel_config_set_write_increment(&dma_conf, true);
|
|
|
|
|
channel_config_set_ring(&dma_conf, true, RX_BITS_DEPTH);
|
|
|
|
|
channel_config_set_dreq(&dma_conf, pio_get_dreq(pio1, 3, false));
|
|
|
|
|
channel_config_set_chain_to(&dma_conf, dma_ch_in_cos);
|
|
|
|
|
dma_channel_configure(dma_ch_in_sin, &dma_conf, rx_sin, &pio1->rxf[3], 2, true);
|
|
|
|
|
|
|
|
|
|
multicore_launch_core1(rf_rx);
|
|
|
|
|
|
|
|
|
|
int8_t *block;
|
|
|
|
|
|
|
|
|
|
while (queue_try_remove(&iq_queue, &block))
|
|
|
|
|
/* Flush the queue */;
|
|
|
|
|
|
|
|
|
|
rf_rx_start();
|
|
|
|
|
sleep_us(100);
|
|
|
|
|
pwm_set_enabled(slice, true);
|
|
|
|
|
|
|
|
|
|
multicore_launch_core1(rf_rx);
|
|
|
|
|
unsigned addr = 0;
|
|
|
|
|
int prev = 0;
|
|
|
|
|
int h0 = 0, h1 = 0, h2 = 0, h3 = 0, h4 = 0, h5 = 0, h6 = 0, h7 = 0;
|
|
|
|
|
int k0 = 0, k1 = 0, k2 = 0, k3 = 0, k4 = 0, k5 = 0, k6 = 0, k7 = 0;
|
|
|
|
|
|
|
|
|
|
while (true) {
|
|
|
|
|
int cmd;
|
|
|
|
|
@ -588,23 +705,62 @@ static void do_rx()
|
|
|
|
|
goto done;
|
|
|
|
|
|
|
|
|
|
if (queue_try_remove(&iq_queue, &block)) {
|
|
|
|
|
fwrite(block, IQ_BLOCK_LEN, 1, stdout);
|
|
|
|
|
fflush(stdout);
|
|
|
|
|
} else {
|
|
|
|
|
int wait = rnd_next() & 0x1fff;
|
|
|
|
|
for (int i = 0; i < IQ_BLOCK_LEN; i += 2) {
|
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|
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|
while (addr == dma_hw->ch[dma_ch_aout].read_addr)
|
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|
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|
sleep_us(1);
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|
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for (int i = 0; i < wait; i++)
|
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|
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|
asm volatile("nop");
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addr += 2;
|
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|
|
|
|
|
|
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if (addr >= (unsigned)aout_buf + AOUT_WORDS * 2)
|
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|
addr = (unsigned)aout_buf;
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|
|
|
|
|
|
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unsigned pos = addr - (unsigned)aout_buf;
|
|
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pos /= 2;
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|
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|
pos += AOUT_WORDS - 2;
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|
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pos &= AOUT_WORDS - 1;
|
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|
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|
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|
//int sample = (127 / M_PI) * atan2f(block[i + 1], block[i]);
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|
|
|
int sample = fast_atan2(block[i + 1], block[i]) / (CORDIC_PI / 128);
|
|
|
|
|
int phase = sample - prev;
|
|
|
|
|
prev = sample;
|
|
|
|
|
|
|
|
|
|
uint8_t audio = 128 + (uint8_t)phase;
|
|
|
|
|
|
|
|
|
|
h7 = h6, h6 = h5, h5 = h4, h4 = h3, h3 = h2, h2 = h1, h1 = h0,
|
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|
|
|
h0 = audio;
|
|
|
|
|
audio = (h0 + h1 + h2 + h3 + h4 + h5 + h6 + h7) / 8;
|
|
|
|
|
|
|
|
|
|
k7 = k6, k6 = k5, k5 = k4, k4 = k3, k3 = k2, k2 = k1, k1 = k0,
|
|
|
|
|
k0 = audio;
|
|
|
|
|
audio = (k0 + k1 + k2 + k3 + k4 + k5 + k6 + k7) / 8;
|
|
|
|
|
|
|
|
|
|
aout_buf[pos] = audio;
|
|
|
|
|
block[i] = audio;
|
|
|
|
|
block[i + 1] = audio;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
//fwrite(block, IQ_BLOCK_LEN, 1, stdout);
|
|
|
|
|
//fflush(stdout);
|
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
done:
|
|
|
|
|
pwm_set_enabled(slice, false);
|
|
|
|
|
multicore_fifo_push_blocking(0);
|
|
|
|
|
multicore_fifo_pop_blocking();
|
|
|
|
|
sleep_us(100);
|
|
|
|
|
sleep_us(10);
|
|
|
|
|
multicore_reset_core1();
|
|
|
|
|
|
|
|
|
|
rf_rx_stop();
|
|
|
|
|
|
|
|
|
|
dma_channel_abort(dma_ch_in_cos);
|
|
|
|
|
dma_channel_abort(dma_ch_in_sin);
|
|
|
|
|
dma_channel_cleanup(dma_ch_in_cos);
|
|
|
|
|
dma_channel_cleanup(dma_ch_in_sin);
|
|
|
|
|
dma_channel_unclaim(dma_ch_in_cos);
|
|
|
|
|
dma_channel_unclaim(dma_ch_in_sin);
|
|
|
|
|
dma_ch_in_cos = -1;
|
|
|
|
|
dma_ch_in_sin = -1;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
int main()
|
|
|
|
|
@ -615,11 +771,24 @@ int main()
|
|
|
|
|
CLK_SYS_HZ);
|
|
|
|
|
|
|
|
|
|
/* Enable PSU PWM mode. */
|
|
|
|
|
gpio_init(PSU_PIN);
|
|
|
|
|
gpio_disable_pulls(PSU_PIN);
|
|
|
|
|
gpio_set_function(PSU_PIN, GPIO_FUNC_SIO);
|
|
|
|
|
gpio_set_dir(PSU_PIN, GPIO_OUT);
|
|
|
|
|
gpio_put(PSU_PIN, 1);
|
|
|
|
|
|
|
|
|
|
/* Prioritize DMA over CPU. */
|
|
|
|
|
/* Configure audio output. */
|
|
|
|
|
slice = pwm_gpio_to_slice_num(AOUT_PIN);
|
|
|
|
|
chan = pwm_gpio_to_channel(AOUT_PIN);
|
|
|
|
|
gpio_set_drive_strength(AOUT_PIN, GPIO_DRIVE_STRENGTH_2MA);
|
|
|
|
|
gpio_set_slew_rate(AOUT_PIN, GPIO_SLEW_RATE_SLOW);
|
|
|
|
|
pwm_set_clkdiv_int_frac(slice, 1, 0);
|
|
|
|
|
pwm_set_enabled(slice, false);
|
|
|
|
|
pwm_set_wrap(slice, 2048);
|
|
|
|
|
pwm_set_chan_level(slice, chan, 0);
|
|
|
|
|
|
|
|
|
|
gpio_disable_pulls(AOUT_PIN);
|
|
|
|
|
gpio_set_function(AOUT_PIN, GPIO_FUNC_PWM);
|
|
|
|
|
|
|
|
|
|
bus_ctrl_hw->priority |= BUSCTRL_BUS_PRIORITY_DMA_W_BITS | BUSCTRL_BUS_PRIORITY_DMA_R_BITS;
|
|
|
|
|
|
|
|
|
|
stdio_usb_init();
|
|
|
|
|
@ -627,11 +796,11 @@ int main()
|
|
|
|
|
|
|
|
|
|
queue_init(&iq_queue, sizeof(uint8_t *), IQ_QUEUE_LEN);
|
|
|
|
|
|
|
|
|
|
rx_lo_init(frequency + sample_rate, true);
|
|
|
|
|
rx_lo_init(INIT_FREQ - INIT_SAMPLE_RATE, true);
|
|
|
|
|
|
|
|
|
|
/* We need to have the sampling timer ready. */
|
|
|
|
|
dma_t_samp = dma_claim_unused_timer(true);
|
|
|
|
|
dma_timer_set_fraction(dma_t_samp, 1, CLK_SYS_HZ / (sample_rate * DECIMATE));
|
|
|
|
|
run_command(0x02, 200000);
|
|
|
|
|
run_command(0x01, 88200000);
|
|
|
|
|
do_rx(10, 11);
|
|
|
|
|
|
|
|
|
|
while (true) {
|
|
|
|
|
if (check_command() > 0) {
|
|
|
|
|
@ -641,7 +810,7 @@ int main()
|
|
|
|
|
fwrite(header, sizeof header, 1, stdout);
|
|
|
|
|
fflush(stdout);
|
|
|
|
|
|
|
|
|
|
do_rx();
|
|
|
|
|
do_rx(10, 11);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
sleep_ms(10);
|
|
|
|
|
|
