Fix frequency rounding

- Use less DMAs
- Improve bit counting
- Fix sample_rate changes and other fixes

.gitignore

@@ -1,3 +1,2 @@
 /build/
 /grc/*.py
-/src/.clangd

README.md

@@ -2,13 +2,11 @@
 
 Using RP2040 / Raspberry Pi Pico as a software-defined radio receiver.
 
-See the [blog post](https://blog.porucha.net/2024/pico-sdr/) for more information. Older code the article is mostly referring to can be found in the branch `old` and a more up-to-date approach in the branch `master`.
-
-This branch contains code to use RP2040 and some passives as a superheterodyne receiver. It is still very much work in progress.
+See the [blog post](https://blog.porucha.net/2024/pico-sdr/) for more information. Older code the article is mostly referring to can be found in the branch `old`.
 
 ## Circuit
 
-Please refer to [the simulation](https://www.falstad.com/circuit/circuitjs.html?ctz=CQAgjCBMB0CsCmBaMAGEAOW0AsLboHYA2SWSIsWMIkAtFaFFCWNBZMAKEoE5wV06ENiE8ekYULZpUTOfM4BzfoMnhU2NfU4AlED2ybERTeh41jmmfpHyZ0IrHAOn9OJ0goC4AMyQhiOa+RGiBNE4AkgBi3ESihiBh-LiJQehgBlAgPtA+INp6BkZ+NprUwiBOPnZy2bn5DQywnABOtGSJGRIEHUkydpwA7smhXSOpNCicAMaVIRMgjhZBMkjeyA7YYjzoXiGwPuJGYC6cADaLsMs0PRJ9+Yzy288vz4k5B8REPGAi2HSQHzoNb5GbtO5BW6NcBIIQnEzbIgmMCQOiwWDEZyOJTghpQ8raYZQpLoEQLKbDUkBIJFcmtbJxBbYEzkypTTwQVEQmiQSBGFY2ELySS1BhPV4SsTgcRyTgRcbIcSlTpK6w5HxDOahIJXNBkqYANygBG5DOpk3AGHQnmF9Ea7jaGm1NDAYB81warBxbv8DR9cItU1m-oWIbtYFhiTFzDi4lYkDA1oIQJQVnO4EBppD92jcklkqjj2YifQPhN5BIBgIgm8FOViokVJVEjrTYbuPbUwARhgiOs+TJsK79LXOAAPXtORCkPgGPjTq4VPkgHQABU8uHHtBNiU8eWtRhtFXKAHFVxEAPIAHQAzs0J8R56gaNaIMgUHkyjQz5fb+hNU6iQsoBJR1mIEhkrqWhbgQBAQIcGCAsIEHgN+57XjePCalBSTMvykycD2GRvpQEDMnkiBAqCE7ugE1A0ORnREJ+UCaAAggAdgALvAHEcQAhmCrruqGmasrmTAQPCQJXL8sDiD4PhuhiWLNAA9tklQon6PiwNgPhWHAZZIjsyImO6PCuEWEBoBIeQakAA).
+![](circuit.svg)
 
 ## Software
 
@@ -34,4 +32,4 @@ Please refer to [the simulation](https://www.falstad.com/circuit/circuitjs.html?
 
 4. Open `grc/PicoSDR-WBFM.grc` in GNU Radio Companion, adjust carrier frequency to match your favorite FM radio station and press `F6`.
 
-5. Alternatively [gqrx](https://www.gqrx.dk/) works fine with `rtl_tcp` input mode. Maximum sample rate seem to be 400 ksps, above that the samples are dropped. Make sure to set LNA gain to 0, gain control is digital and does not provide any benefits unless you lower your sampling rate significantly.
+5. Alternatively [gqrx](https://www.gqrx.dk/) works fine with `rtl_tcp` input mode. Maximum sample rate seem to be 400 ksps, above that the samples are dropped. Make sure to adjust LNA gain to +30 dB. It's not accurate, but it does control bias strength which in turn does affect analog gain.

grc/PicoSDR-WBFM.grc

@@ -37,7 +37,7 @@ blocks:
   id: variable
   parameters:
     comment: ''
-    value: '88_200_000'
+    value: '94_600_000'
   states:
     bus_sink: false
     bus_source: false
@@ -374,7 +374,7 @@ blocks:
     freq7: 100e6
     freq8: 100e6
     freq9: 100e6
-    gain0: '30'
+    gain0: '0'
     gain1: '10'
     gain10: '10'
     gain11: '10'

grc/PicoSDR.grc

@@ -401,7 +401,7 @@ blocks:
     freq7: 100e6
     freq8: 100e6
     freq9: 100e6
-    gain0: '30'
+    gain0: '0'
     gain1: '10'
     gain10: '10'
     gain11: '10'

src/main.c

@@ -22,53 +22,38 @@
 #include <stdlib.h>
 
 #define VREG_VOLTAGE VREG_VOLTAGE_1_20
-#define CLK_SYS_HZ (300 * MHZ)
+#define CLK_SYS_HZ (306 * MHZ)
 
-#define INIT_SAMPLE_RATE 200000
-#define INIT_FREQ 94600000
-#define INIT_GAIN 127
-
-#define LO_PIN 9
-#define RX_PIN 13
-#define FB_PIN 5
+#define RX_PIN 10
+#define FB_PIN 11
 #define PSU_PIN 23
 
-#define PIO pio1
-#define SM_LO 0
-#define SM_FB 1
-#define SM_RX 2
-#define SM_AD 3
+#define PIO pio0
+#define SM_RX 0
+#define SM_BIAS 1
+#define SM_COS 2
+#define SM_SIN 3
 
 #define IQ_SAMPLES 32
 #define IQ_BLOCK_LEN (2 * IQ_SAMPLES)
 #define IQ_QUEUE_LEN 8
 
-/*
- * NOTE: Must have 256 phases with 256 bytes each.
- *       Otherwise the DMA 1-byte write trick wouldn't work.
- */
+#define XOR_ADDR 0x1000
+#define LO_BITS_DEPTH 15
+#define LO_WORDS (1 << (LO_BITS_DEPTH - 2))
+#define LO_COS_ACCUMULATOR (&PIO->sm[SM_COS].pinctrl)
+#define LO_SIN_ACCUMULATOR (&PIO->sm[SM_SIN].pinctrl)
+#define SIN_PHASE (0u)
+#define COS_PHASE (3u << 30)
 
-#define LO_NUM_PHASES 256
-#define LO_PHASE_BITS 8
-#define LO_PHASE_WORDS (1 << (LO_PHASE_BITS - 2))
-#define STEP_BASE ((UINT_MAX + 1.0) / CLK_SYS_HZ)
+static uint32_t lo_cos[LO_WORDS] __attribute__((__aligned__(1 << LO_BITS_DEPTH)));
+static uint32_t lo_sin[LO_WORDS] __attribute__((__aligned__(1 << LO_BITS_DEPTH)));
 
-static uint32_t nco_step = (uint32_t)(STEP_BASE * INIT_FREQ) * 32 * LO_PHASE_WORDS;
-static uint32_t nco_null = 0;
+#define DECIMATE 4
 
-static uint32_t lo_phase[LO_NUM_PHASES][LO_PHASE_WORDS]
-	__attribute__((__aligned__(LO_NUM_PHASES * 4 * LO_PHASE_WORDS)));
-
-static uint32_t nco_addr = (uint32_t)lo_phase;
-
-#define DECIMATE 16
-#define RX_BITS_DEPTH 8
-#define RX_WORDS (1 << (RX_BITS_DEPTH - 2))
-#define RX_STRIDE (2 * DECIMATE)
-
-static_assert(RX_WORDS >= 2 * RX_STRIDE, "RX_WORDS >= 2 * RX_STRIDE");
-
-static uint32_t rx_cos[RX_WORDS] __attribute__((__aligned__(1 << RX_BITS_DEPTH)));
+#define INIT_SAMPLE_RATE 100000
+#define INIT_FREQ 94600000
+#define INIT_GAIN 127
 
 #define NUM_GAINS 29
 static int gains[NUM_GAINS] = { 0,   9,	  14,  27,  37,	 77,  87,  125, 144, 157,
@@ -76,35 +61,15 @@ static int gains[NUM_GAINS] = { 0,   9,	  14,  27,  37,	 77,  87,  125, 144, 157
 				372, 386, 402, 421, 434, 439, 445, 480, 496 };
 static int sample_rate = INIT_SAMPLE_RATE;
 static int max_amplitude = CLK_SYS_HZ / INIT_SAMPLE_RATE / 2;
-static int max_amplitude_mul = 65536 / (CLK_SYS_HZ / INIT_SAMPLE_RATE / 2);
 static int gain = INIT_GAIN;
 static int frequency = INIT_FREQ;
 
-static int dma_ch_rx1 = -1;
-static int dma_ch_rx2 = -1;
-
-static int dma_ch_nco1 = -1;
-static int dma_ch_nco2 = -1;
-static int dma_ch_nco3 = -1;
-static int dma_ch_mix = -1;
-
-static int dma_ch_samp_cos = -1;
-
-static int dma_t_samp = -1;
-
-static int dma_ch_in_cos = -1;
-
 static queue_t iq_queue;
 static uint8_t iq_queue_buffer[IQ_QUEUE_LEN][IQ_BLOCK_LEN];
 static size_t iq_queue_pos = 0;
 
 static uint32_t rnd = 0;
 
-static int origin_lo = -1;
-static int origin_rx = -1;
-static int origin_fb = -1;
-static int origin_ad = 0;
-
 inline static __unused uint32_t rnd_next()
 {
 	rnd = rnd * 0x41c64e6d + 12345;
@@ -119,85 +84,22 @@ static void dma_channel_clear_chain_to(int ch)
 	dma_hw->ch[ch].al1_ctrl = ctrl;
 }
 
-static void init_lo()
-{
-	gpio_disable_pulls(LO_PIN);
-	pio_gpio_init(PIO, LO_PIN);
+/* rx -> cp -> cos -> sin -> pio_cos -> pio_sin -> rx ... */
+static int dma_ch_rx = -1;
+static int dma_ch_cp = -1;
+static int dma_ch_cos = -1;
+static int dma_ch_sin = -1;
+static int dma_ch_pio_cos = -1;
+static int dma_ch_pio_sin = -1;
 
-	gpio_set_drive_strength(LO_PIN, GPIO_DRIVE_STRENGTH_12MA);
-	gpio_set_slew_rate(LO_PIN, GPIO_SLEW_RATE_FAST);
+static int dma_ch_samp_cos = -1;
+static int dma_ch_samp_sin = -1;
 
-	const uint16_t insn[] = {
-		pio_encode_out(pio_pindirs, 1),
-	};
+static int dma_t_samp = -1;
 
-	pio_program_t prog = {
-		.instructions = insn,
-		.length = sizeof(insn) / sizeof(*insn),
-		.origin = origin_lo,
-	};
-
-	pio_sm_restart(PIO, SM_LO);
-	pio_sm_clear_fifos(PIO, SM_LO);
-
-	if (pio_can_add_program(PIO, &prog))
-		origin_lo = pio_add_program(PIO, &prog);
-
-	pio_sm_config pc = pio_get_default_sm_config();
-	sm_config_set_out_pins(&pc, LO_PIN, 1);
-	sm_config_set_set_pins(&pc, LO_PIN, 1);
-	sm_config_set_wrap(&pc, origin_lo, origin_lo + prog.length - 1);
-	sm_config_set_clkdiv_int_frac(&pc, 1, 0);
-	sm_config_set_fifo_join(&pc, PIO_FIFO_JOIN_TX);
-	sm_config_set_out_shift(&pc, false, true, 32);
-	pio_sm_init(PIO, SM_LO, origin_lo, &pc);
-
-	pio_sm_set_consecutive_pindirs(PIO, SM_LO, LO_PIN, 1, GPIO_IN);
-	pio_sm_exec_wait_blocking(PIO, SM_LO, pio_encode_set(pio_pins, 0));
-}
-
-static void init_fb()
-{
-	gpio_disable_pulls(FB_PIN);
-	pio_gpio_init(PIO, FB_PIN);
-
-	// NOTE: Not sure if this is ideal.
-	hw_set_bits(&PIO->input_sync_bypass, 1u << RX_PIN);
-
-	gpio_set_input_hysteresis_enabled(RX_PIN, false);
-	gpio_set_drive_strength(FB_PIN, GPIO_DRIVE_STRENGTH_2MA);
-	gpio_set_slew_rate(FB_PIN, GPIO_SLEW_RATE_SLOW);
-
-	const uint16_t insn[] = {
-		pio_encode_mov_not(pio_pins, pio_pins) | pio_encode_sideset(1, 1) |
-			pio_encode_delay(0),
-		//pio_encode_nop() | pio_encode_sideset(1, 0) | pio_encode_delay(0),
-	};
-
-	pio_program_t prog = {
-		.instructions = insn,
-		.length = sizeof(insn) / sizeof(*insn),
-		.origin = origin_fb,
-	};
-
-	pio_sm_restart(PIO, SM_FB);
-	pio_sm_clear_fifos(PIO, SM_FB);
-
-	if (pio_can_add_program(PIO, &prog))
-		origin_fb = pio_add_program(PIO, &prog);
-
-	pio_sm_config pc = pio_get_default_sm_config();
-	sm_config_set_sideset(&pc, 1, false, true);
-	sm_config_set_in_pins(&pc, RX_PIN);
-	sm_config_set_out_pins(&pc, FB_PIN, 1);
-	sm_config_set_set_pins(&pc, FB_PIN, 1);
-	sm_config_set_sideset_pins(&pc, FB_PIN);
-	sm_config_set_wrap(&pc, origin_fb, origin_fb + prog.length - 1);
-	sm_config_set_clkdiv_int_frac(&pc, 1, 0);
-	pio_sm_init(PIO, SM_FB, origin_fb, &pc);
-
-	pio_sm_set_consecutive_pindirs(PIO, SM_FB, FB_PIN, 1, GPIO_OUT);
-}
+static int origin_rx = -1;
+static int origin_bias = -1;
+static int origin_adder = 0;
 
 static void init_rx()
 {
@@ -214,9 +116,6 @@ static void init_rx()
 		.origin = origin_rx,
 	};
 
-	pio_sm_restart(PIO, SM_RX);
-	pio_sm_clear_fifos(PIO, SM_RX);
-
 	if (pio_can_add_program(PIO, &prog))
 		origin_rx = pio_add_program(PIO, &prog);
 
@@ -231,9 +130,61 @@ static void init_rx()
 	pio_sm_set_consecutive_pindirs(PIO, SM_RX, RX_PIN, 1, GPIO_IN);
 }
 
+static void init_bias()
+{
+	gpio_disable_pulls(RX_PIN);
+	gpio_disable_pulls(FB_PIN);
+
+	pio_gpio_init(PIO, FB_PIN);
+
+	gpio_set_input_hysteresis_enabled(RX_PIN, false);
+	gpio_set_drive_strength(FB_PIN, GPIO_DRIVE_STRENGTH_2MA);
+	gpio_set_slew_rate(FB_PIN, GPIO_SLEW_RATE_SLOW);
+
+	PIO->input_sync_bypass = 1u << RX_PIN;
+
+	const uint16_t insn[] = {
+		pio_encode_mov(pio_isr, pio_null),
+		pio_encode_in(pio_y, 4),
+		pio_encode_in(pio_pins, 1) | pio_encode_delay(15),
+		pio_encode_in(pio_pins, 1) | pio_encode_delay(15),
+
+		pio_encode_mov(pio_y, pio_isr),
+		pio_encode_mov(pio_x, pio_isr),
+
+		pio_encode_jmp_x_dec(6),
+		pio_encode_mov_not(pio_pins, pio_pins) | pio_encode_sideset(1, 1),
+	};
+
+	pio_program_t prog = {
+		.instructions = insn,
+		.length = sizeof(insn) / sizeof(*insn),
+		.origin = origin_bias,
+	};
+
+	if (pio_can_add_program(PIO, &prog))
+		origin_bias = pio_add_program(PIO, &prog);
+
+	pio_sm_config pc = pio_get_default_sm_config();
+	sm_config_set_in_shift(&pc, false, false, 32);
+	sm_config_set_sideset(&pc, 1, false, true);
+	sm_config_set_sideset_pins(&pc, FB_PIN);
+	sm_config_set_in_pins(&pc, RX_PIN);
+	sm_config_set_out_pins(&pc, FB_PIN, 1);
+	sm_config_set_set_pins(&pc, RX_PIN, 1);
+
+	sm_config_set_wrap(&pc, origin_bias, origin_bias + prog.length - 1);
+
+	sm_config_set_clkdiv_int_frac(&pc, 1, 0);
+	pio_sm_init(PIO, SM_BIAS, origin_bias, &pc);
+
+	pio_sm_exec_wait_blocking(PIO, SM_BIAS, pio_encode_set(pio_y, 31));
+	pio_sm_set_consecutive_pindirs(PIO, SM_BIAS, FB_PIN, 1, GPIO_OUT);
+}
+
 static const uint32_t samp_insn = 16;
 
-static void init_ad()
+static void init_adder()
 {
 	const uint16_t insn[] = {
 		pio_encode_out(pio_pc, 4), // 0000 +0
@@ -261,31 +212,32 @@ static void init_ad()
 		pio_encode_in(pio_x, 32),
 		pio_encode_set(pio_y, 0),
 		pio_encode_set(pio_x, 0),
-		pio_encode_jmp_y_dec(21),
-		pio_encode_jmp_x_dec(22),
+		//pio_encode_jmp_y_dec(21),
+		//pio_encode_jmp_x_dec(22),
 		pio_encode_out(pio_pc, 4),
 	};
 
 	pio_program_t prog = {
 		.instructions = insn,
 		.length = sizeof(insn) / sizeof(*insn),
-		.origin = origin_ad,
+		.origin = origin_adder,
 	};
 
-	pio_sm_restart(PIO, SM_AD);
-	pio_sm_clear_fifos(PIO, SM_AD);
-
 	if (pio_can_add_program(PIO, &prog))
-		pio_add_program(PIO, &prog);
+		origin_adder = pio_add_program(PIO, &prog);
 
 	pio_sm_config pc = pio_get_default_sm_config();
-	sm_config_set_wrap(&pc, origin_ad, origin_ad + 15);
+	sm_config_set_wrap(&pc, origin_adder, origin_adder + 15);
 	sm_config_set_clkdiv_int_frac(&pc, 1, 0);
 	sm_config_set_in_shift(&pc, false, true, 32);
 	sm_config_set_out_shift(&pc, false, true, 32);
-	pio_sm_init(PIO, SM_AD, origin_ad, &pc);
+
+	pio_sm_init(PIO, SM_COS, origin_adder, &pc);
+	pio_sm_init(PIO, SM_SIN, origin_adder, &pc);
 }
 
+#define STEP_BASE ((UINT_MAX + 1.0) / CLK_SYS_HZ)
+
 static void lo_generate_phase(uint32_t *buf, size_t len, uint32_t step, uint32_t phase)
 {
 	for (size_t i = 0; i < len; i++) {
@@ -301,104 +253,118 @@ static void lo_generate_phase(uint32_t *buf, size_t len, uint32_t step, uint32_t
 	}
 }
 
-static void rx_lo_init(double freq)
+static void rx_lo_init(double req_freq, bool align)
 {
+	const double step_hz = (double)CLK_SYS_HZ / ((8 << LO_BITS_DEPTH) / 2.0);
+	double freq = req_freq;
+
+	if (align)
+		freq = round(freq / step_hz) * step_hz;
+
 	uint32_t step = STEP_BASE * freq;
 
-	for (uint32_t i = 0; i < LO_NUM_PHASES; i++)
-		lo_generate_phase(lo_phase[i], LO_PHASE_WORDS, step, i << 24);
-
-	nco_step = step * 32 * LO_PHASE_WORDS;
+	lo_generate_phase(lo_cos, LO_WORDS, step, COS_PHASE);
+	lo_generate_phase(lo_sin, LO_WORDS, step, SIN_PHASE);
 }
 
 static void rf_rx_start()
 {
-	dma_ch_rx1 = dma_claim_unused_channel(true);
-	dma_ch_rx2 = dma_claim_unused_channel(true);
-
-	dma_ch_nco1 = dma_claim_unused_channel(true);
-	dma_ch_nco2 = dma_claim_unused_channel(true);
-	dma_ch_nco3 = dma_claim_unused_channel(true);
-	dma_ch_mix = dma_claim_unused_channel(true);
+	dma_ch_rx = dma_claim_unused_channel(true);
+	dma_ch_cp = dma_claim_unused_channel(true);
+	dma_ch_cos = dma_claim_unused_channel(true);
+	dma_ch_sin = dma_claim_unused_channel(true);
+	dma_ch_pio_cos = dma_claim_unused_channel(true);
+	dma_ch_pio_sin = dma_claim_unused_channel(true);
 
 	dma_ch_samp_cos = dma_claim_unused_channel(true);
+	dma_ch_samp_sin = dma_claim_unused_channel(true);
 
 	dma_channel_config dma_conf;
 
-	/* Copy PDM bitstream into decimator. */
-	dma_conf = dma_channel_get_default_config(dma_ch_rx1);
+	/* Read received word into accumulator I. */
+	dma_conf = dma_channel_get_default_config(dma_ch_rx);
 	channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
 	channel_config_set_read_increment(&dma_conf, false);
 	channel_config_set_write_increment(&dma_conf, false);
-	channel_config_set_dreq(&dma_conf, pio_get_dreq(PIO, SM_RX, GPIO_IN));
-	channel_config_set_chain_to(&dma_conf, dma_ch_rx2);
-	dma_channel_configure(dma_ch_rx1, &dma_conf, &PIO->txf[SM_AD], &PIO->rxf[SM_RX], UINT_MAX,
+	channel_config_set_dreq(&dma_conf, pio_get_dreq(PIO, SM_RX, false));
+	channel_config_set_chain_to(&dma_conf, dma_ch_cp);
+	dma_channel_configure(dma_ch_rx, &dma_conf, LO_COS_ACCUMULATOR, &PIO->rxf[SM_RX], 1, false);
+
+	/* Copy accumulator I to accumulator Q. */
+	dma_conf = dma_channel_get_default_config(dma_ch_cp);
+	channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
+	channel_config_set_read_increment(&dma_conf, false);
+	channel_config_set_write_increment(&dma_conf, false);
+	channel_config_set_chain_to(&dma_conf, dma_ch_cos);
+	dma_channel_configure(dma_ch_cp, &dma_conf, LO_SIN_ACCUMULATOR, LO_COS_ACCUMULATOR, 1,
 			      false);
 
-	dma_conf = dma_channel_get_default_config(dma_ch_rx2);
-	channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
-	channel_config_set_read_increment(&dma_conf, false);
-	channel_config_set_write_increment(&dma_conf, false);
-	channel_config_set_dreq(&dma_conf, pio_get_dreq(PIO, SM_RX, GPIO_IN));
-	channel_config_set_chain_to(&dma_conf, dma_ch_rx1);
-	dma_channel_configure(dma_ch_rx2, &dma_conf, &PIO->txf[SM_AD], &PIO->rxf[SM_RX], UINT_MAX,
-			      false);
-
-	/* Step the NCO. */
-	dma_conf = dma_channel_get_default_config(dma_ch_nco1);
-	channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
-	channel_config_set_read_increment(&dma_conf, false);
-	channel_config_set_write_increment(&dma_conf, false);
-	channel_config_set_chain_to(&dma_conf, dma_ch_nco2);
-	dma_channel_configure(dma_ch_nco1, &dma_conf, &nco_null, &nco_step, 1, false);
-
-	/* DMA above will increment the phase accumulator. */
-	dma_sniffer_enable(dma_ch_nco1, DMA_SNIFF_CTRL_CALC_VALUE_SUM, true);
-
-	/* Prepare the phase address. */
-	dma_conf = dma_channel_get_default_config(dma_ch_nco2);
-	channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_8);
-	channel_config_set_read_increment(&dma_conf, false);
-	channel_config_set_write_increment(&dma_conf, false);
-	channel_config_set_chain_to(&dma_conf, dma_ch_nco3);
-	dma_channel_configure(dma_ch_nco2, &dma_conf, (uint8_t *)(&nco_addr) + 1,
-			      ((uint8_t *)&dma_hw->sniff_data) + 3, 1, false);
-
-	/* Trigger LO using the address. */
-	dma_conf = dma_channel_get_default_config(dma_ch_nco3);
-	channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
-	channel_config_set_read_increment(&dma_conf, false);
-	channel_config_set_write_increment(&dma_conf, false);
-	dma_channel_configure(dma_ch_nco3, &dma_conf, &dma_hw->ch[dma_ch_mix].al3_read_addr_trig,
-			      &nco_addr, 1, false);
-
-	/* Drive the LO capacitor. */
-	dma_conf = dma_channel_get_default_config(dma_ch_mix);
+	/* Read lo_cos into accumulator I with XOR. */
+	dma_conf = dma_channel_get_default_config(dma_ch_cos);
 	channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
 	channel_config_set_read_increment(&dma_conf, true);
 	channel_config_set_write_increment(&dma_conf, false);
-	channel_config_set_dreq(&dma_conf, pio_get_dreq(PIO, SM_LO, GPIO_OUT));
-	channel_config_set_chain_to(&dma_conf, dma_ch_nco1);
-	dma_channel_configure(dma_ch_mix, &dma_conf, &PIO->txf[SM_LO], lo_phase, LO_PHASE_WORDS,
+	channel_config_set_ring(&dma_conf, false, LO_BITS_DEPTH);
+	channel_config_set_chain_to(&dma_conf, dma_ch_sin);
+	dma_channel_configure(dma_ch_cos, &dma_conf, LO_COS_ACCUMULATOR + XOR_ADDR / 4, lo_cos, 1,
 			      false);
 
-	/* Trigger accumulator values push. */
+	/* Read lo_sin into accumulator Q with XOR. */
+	dma_conf = dma_channel_get_default_config(dma_ch_sin);
+	channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
+	channel_config_set_read_increment(&dma_conf, true);
+	channel_config_set_write_increment(&dma_conf, false);
+	channel_config_set_ring(&dma_conf, false, LO_BITS_DEPTH);
+	channel_config_set_chain_to(&dma_conf, dma_ch_pio_cos);
+	dma_channel_configure(dma_ch_sin, &dma_conf, LO_SIN_ACCUMULATOR + XOR_ADDR / 4, lo_sin, 1,
+			      false);
+
+	/* Copy mixed I accumulator to PIO adder I. */
+	dma_conf = dma_channel_get_default_config(dma_ch_pio_cos);
+	channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
+	channel_config_set_read_increment(&dma_conf, false);
+	channel_config_set_write_increment(&dma_conf, false);
+	channel_config_set_dreq(&dma_conf, pio_get_dreq(PIO, SM_COS, true));
+	channel_config_set_chain_to(&dma_conf, dma_ch_pio_sin);
+	dma_channel_configure(dma_ch_pio_cos, &dma_conf, &PIO->txf[SM_COS], LO_COS_ACCUMULATOR, 1,
+			      false);
+
+	/* Copy mixed Q accumulator to PIO adder Q. */
+	dma_conf = dma_channel_get_default_config(dma_ch_pio_sin);
+	channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
+	channel_config_set_read_increment(&dma_conf, false);
+	channel_config_set_write_increment(&dma_conf, false);
+	channel_config_set_dreq(&dma_conf, pio_get_dreq(PIO, SM_SIN, true));
+	channel_config_set_chain_to(&dma_conf, dma_ch_rx);
+	dma_channel_configure(dma_ch_pio_sin, &dma_conf, &PIO->txf[SM_SIN], LO_SIN_ACCUMULATOR, 1,
+			      false);
+
+	/* Trigger I accumulator values push. */
 	dma_conf = dma_channel_get_default_config(dma_ch_samp_cos);
 	channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
 	channel_config_set_read_increment(&dma_conf, false);
 	channel_config_set_write_increment(&dma_conf, false);
-	channel_config_set_high_priority(&dma_conf, true);
 	channel_config_set_dreq(&dma_conf, dma_get_timer_dreq(dma_t_samp));
-	dma_channel_configure(dma_ch_samp_cos, &dma_conf, &PIO->sm[SM_AD].instr, &samp_insn,
-			      UINT_MAX, false);
+	channel_config_set_high_priority(&dma_conf, true);
+	channel_config_set_chain_to(&dma_conf, dma_ch_samp_sin);
+	dma_channel_configure(dma_ch_samp_cos, &dma_conf, &PIO->sm[SM_COS].instr, &samp_insn, 1,
+			      false);
 
-	init_ad();
-	init_lo();
-	init_fb();
+	/* Trigger Q accumulator values push. */
+	dma_conf = dma_channel_get_default_config(dma_ch_samp_sin);
+	channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
+	channel_config_set_read_increment(&dma_conf, false);
+	channel_config_set_write_increment(&dma_conf, false);
+	channel_config_set_high_priority(&dma_conf, true);
+	channel_config_set_chain_to(&dma_conf, dma_ch_samp_cos);
+	dma_channel_configure(dma_ch_samp_sin, &dma_conf, &PIO->sm[SM_SIN].instr, &samp_insn, 1,
+			      false);
+
+	init_bias();
+	init_adder();
 	init_rx();
 
-	dma_channel_start(dma_ch_rx1);
-	dma_channel_start(dma_ch_nco1);
+	dma_channel_start(dma_ch_rx);
 	dma_channel_start(dma_ch_samp_cos);
 
 	pio_set_sm_mask_enabled(PIO, 0x0f, true);
@@ -408,167 +374,98 @@ static void rf_rx_stop(void)
 {
 	pio_set_sm_mask_enabled(PIO, 0x0f, false);
 
+	pio_sm_restart(PIO, 0);
+	pio_sm_restart(PIO, 1);
+	pio_sm_restart(PIO, 2);
+	pio_sm_restart(PIO, 3);
+
+	pio_sm_clear_fifos(PIO, 0);
+	pio_sm_clear_fifos(PIO, 1);
+	pio_sm_clear_fifos(PIO, 2);
+	pio_sm_clear_fifos(PIO, 3);
+
 	sleep_us(10);
 
-	dma_channel_clear_chain_to(dma_ch_rx1);
-	dma_channel_clear_chain_to(dma_ch_rx2);
-	dma_channel_clear_chain_to(dma_ch_nco1);
-	dma_channel_clear_chain_to(dma_ch_nco2);
-	dma_channel_clear_chain_to(dma_ch_nco3);
-	dma_channel_clear_chain_to(dma_ch_mix);
+	dma_channel_clear_chain_to(dma_ch_rx);
+	dma_channel_clear_chain_to(dma_ch_cp);
+	dma_channel_clear_chain_to(dma_ch_cos);
+	dma_channel_clear_chain_to(dma_ch_sin);
+	dma_channel_clear_chain_to(dma_ch_pio_cos);
+	dma_channel_clear_chain_to(dma_ch_pio_sin);
 	dma_channel_clear_chain_to(dma_ch_samp_cos);
+	dma_channel_clear_chain_to(dma_ch_samp_sin);
 
-	dma_channel_abort(dma_ch_rx1);
-	dma_channel_abort(dma_ch_rx2);
-	dma_channel_abort(dma_ch_nco1);
-	dma_channel_abort(dma_ch_nco2);
-	dma_channel_abort(dma_ch_nco3);
-	dma_channel_abort(dma_ch_mix);
+	dma_channel_abort(dma_ch_rx);
+	dma_channel_abort(dma_ch_cp);
+	dma_channel_abort(dma_ch_cos);
+	dma_channel_abort(dma_ch_sin);
+	dma_channel_abort(dma_ch_pio_cos);
+	dma_channel_abort(dma_ch_pio_sin);
 	dma_channel_abort(dma_ch_samp_cos);
+	dma_channel_abort(dma_ch_samp_sin);
 
-	dma_channel_cleanup(dma_ch_rx1);
-	dma_channel_cleanup(dma_ch_rx2);
-	dma_channel_cleanup(dma_ch_nco1);
-	dma_channel_cleanup(dma_ch_nco2);
-	dma_channel_cleanup(dma_ch_nco3);
-	dma_channel_cleanup(dma_ch_mix);
+	dma_channel_cleanup(dma_ch_rx);
+	dma_channel_cleanup(dma_ch_cp);
+	dma_channel_cleanup(dma_ch_cos);
+	dma_channel_cleanup(dma_ch_sin);
+	dma_channel_cleanup(dma_ch_pio_cos);
+	dma_channel_cleanup(dma_ch_pio_sin);
 	dma_channel_cleanup(dma_ch_samp_cos);
+	dma_channel_cleanup(dma_ch_samp_sin);
 
-	dma_channel_unclaim(dma_ch_rx1);
-	dma_channel_unclaim(dma_ch_rx2);
-	dma_channel_unclaim(dma_ch_nco1);
-	dma_channel_unclaim(dma_ch_nco2);
-	dma_channel_unclaim(dma_ch_nco3);
-	dma_channel_unclaim(dma_ch_mix);
+	dma_channel_unclaim(dma_ch_rx);
+	dma_channel_unclaim(dma_ch_cp);
+	dma_channel_unclaim(dma_ch_cos);
+	dma_channel_unclaim(dma_ch_sin);
+	dma_channel_unclaim(dma_ch_pio_cos);
+	dma_channel_unclaim(dma_ch_pio_sin);
 	dma_channel_unclaim(dma_ch_samp_cos);
+	dma_channel_unclaim(dma_ch_samp_sin);
 
-	dma_ch_rx1 = -1;
-	dma_ch_rx2 = -1;
-	dma_ch_nco1 = -1;
-	dma_ch_nco2 = -1;
-	dma_ch_nco3 = -1;
-	dma_ch_mix = -1;
+	dma_ch_rx = -1;
+	dma_ch_cp = -1;
+	dma_ch_cos = -1;
+	dma_ch_sin = -1;
+	dma_ch_pio_cos = -1;
+	dma_ch_pio_sin = -1;
 	dma_ch_samp_cos = -1;
+	dma_ch_samp_sin = -1;
 }
 
-struct IQ {
-	int I, Q;
-};
-
-inline static const uint32_t *next_stride()
+inline static uint32_t pio_sm_get_blocking_unsafe(pio_hw_t *pio, int sm)
 {
-	static int tail = 0;
+	while (pio->fstat & (1u << (PIO_FSTAT_RXEMPTY_LSB + sm)))
+		asm volatile("nop");
 
-	int head, delta;
-
-loop:
-	head = (dma_hw->ch[dma_ch_in_cos].write_addr >> 2) & (RX_WORDS - 1);
-	delta = head - tail;
-
-	if (delta < 0)
-		delta += RX_WORDS;
-
-	if (delta < RX_STRIDE)
-		goto loop;
-
-	const uint32_t *stride = rx_cos + tail;
-
-	tail = (tail + RX_STRIDE) & (RX_WORDS - 1);
-
-	return stride;
+	return pio->rxf[sm];
 }
 
-inline static int nextQ(const uint32_t **stride)
+inline static int nextI()
 {
-	int x2 = *(*stride)++;
-	int x1 = *(*stride)++;
+	static int prevI = 0;
 
-	return x2 + x2 + x1 + max_amplitude;
+	int sI = 0;
+	sI -= 2 * pio_sm_get_blocking_unsafe(PIO, SM_COS);
+	sI -= pio_sm_get_blocking_unsafe(PIO, SM_COS);
+
+	int I = sI - prevI;
+	prevI = sI;
+
+	return I;
 }
 
-inline static struct IQ next_sample()
+inline static int nextQ()
 {
-	int I = 0, Q = 0;
+	static int prevQ = 0;
 
-	const uint32_t *stride = next_stride();
+	int sQ = 0;
+	sQ -= 2 * pio_sm_get_blocking_unsafe(PIO, SM_SIN);
+	sQ -= pio_sm_get_blocking_unsafe(PIO, SM_SIN);
 
-	int x15 = nextQ(&stride);
-	I += 93 * x15;
-	Q += 39 * x15;
+	int Q = sQ - prevQ;
+	prevQ = sQ;
 
-	int x14 = nextQ(&stride);
-	I += 71 * x14;
-	Q += 71 * x14;
-
-	int x13 = nextQ(&stride);
-	I += 39 * x13;
-	Q += 93 * x13;
-
-	int x12 = nextQ(&stride);
-	I += 0 * x12;
-	Q += 101 * x12;
-
-	int x11 = nextQ(&stride);
-	I += -39 * x11;
-	Q += 93 * x11;
-
-	int x10 = nextQ(&stride);
-	I += -71 * x10;
-	Q += 71 * x10;
-
-	int x09 = nextQ(&stride);
-	I += -93 * x09;
-	Q += 39 * x09;
-
-	int x08 = nextQ(&stride);
-	I += -101 * x08;
-	Q += 0 * x08;
-
-	int x07 = nextQ(&stride);
-	I += -93 * x07;
-	Q += -39 * x07;
-
-	int x06 = nextQ(&stride);
-	I += -71 * x06;
-	Q += -71 * x06;
-
-	int x05 = nextQ(&stride);
-	I += -39 * x05;
-	Q += -93 * x05;
-
-	int x04 = nextQ(&stride);
-	I += 0 * x04;
-	Q += -101 * x04;
-
-	int x03 = nextQ(&stride);
-	I += 39 * x03;
-	Q += -93 * x03;
-
-	int x02 = nextQ(&stride);
-	I += 71 * x02;
-	Q += -71 * x02;
-
-	int x01 = nextQ(&stride);
-	I += 93 * x01;
-	Q += -39 * x01;
-
-	int x00 = nextQ(&stride);
-	I += 101 * x00;
-	Q += 0 * x00;
-
-	I *= gain;
-	I /= 1024;
-	I *= max_amplitude_mul;
-	I += 127.4 * (1 << 16);
-	I /= (1 << 16);
-
-	Q *= gain;
-	Q /= 1024;
-	Q *= max_amplitude_mul;
-	Q += 127.4 * (1 << 16);
-	Q /= (1 << 16);
-
-	return (struct IQ){ I, Q };
+	return Q;
 }
 
 static void rf_rx(void)
@@ -584,23 +481,39 @@ static void rf_rx(void)
 		uint8_t *blockptr = block;
 
 		for (int i = 0; i < IQ_SAMPLES; i++) {
-			struct IQ IQ = next_sample();
-			int64_t I = IQ.I;
-			int64_t Q = IQ.Q;
+			int I = 0, Q = 0;
 
-			if (I < 0)
-				I = 0;
-			else if (I > 255)
-				I = 255;
+			Q += nextQ();
+			I += nextI();
 
-			*blockptr++ = I;
+			I -= nextQ();
+			Q += nextI();
 
-			if (Q < 0)
-				Q = 0;
-			else if (Q > 255)
-				Q = 255;
+			Q -= nextQ();
+			I -= nextI();
 
-			*blockptr++ = Q;
+			I += nextQ();
+			Q -= nextI();
+
+			I *= gain;
+			I /= max_amplitude;
+
+			if (I > 127)
+				I = 127;
+			else if (I < -128)
+				I = -128;
+
+			*blockptr++ = (uint8_t)I + 128;
+
+			Q *= gain;
+			Q /= max_amplitude;
+
+			if (Q > 127)
+				Q = 127;
+			else if (Q < -128)
+				Q = -128;
+
+			*blockptr++ = (uint8_t)Q + 128;
 		}
 
 		if (queue_try_add(&iq_queue, &block)) {
@@ -614,24 +527,20 @@ static void run_command(uint8_t cmd, uint32_t arg)
 	if (0x01 == cmd) {
 		/* Tune to a new center frequency */
 		frequency = arg;
-		rx_lo_init(frequency + sample_rate);
+		rx_lo_init(frequency + sample_rate, true);
 	} else if (0x02 == cmd) {
 		/* Set the rate at which IQ sample pairs are sent */
 		sample_rate = arg;
 		max_amplitude = CLK_SYS_HZ / sample_rate / 2;
-		max_amplitude_mul = 65536 / max_amplitude;
 		dma_timer_set_fraction(dma_t_samp, 1, CLK_SYS_HZ / (sample_rate * DECIMATE));
-		rx_lo_init(frequency + sample_rate);
+		rx_lo_init(frequency + sample_rate, true);
 	} else if (0x04 == cmd) {
 		/* Set the tuner gain level */
-		gain = INIT_GAIN * powf(10.0f, arg / 200.0f);
+		gain = INIT_GAIN * pow(10.0, arg / 200.0);
 	} else if (0x0d == cmd) {
 		/* Set tuner gain by the tuner's gain index */
-
-		if (arg >= NUM_GAINS)
-			arg = NUM_GAINS - 1;
-
-		gain = INIT_GAIN * powf(10.0f, gains[arg] / 200.0f);
+		if (arg <= NUM_GAINS)
+			gain = INIT_GAIN * pow(10.0, gains[arg] / 200.0);
 	}
 }
 
@@ -661,28 +570,16 @@ static int check_command(void)
 
 static void do_rx()
 {
-	rf_rx_start();
-	sleep_us(100);
-
-	dma_ch_in_cos = dma_claim_unused_channel(true);
-
-	dma_channel_config dma_conf;
-
-	dma_conf = dma_channel_get_default_config(dma_ch_in_cos);
-	channel_config_set_transfer_data_size(&dma_conf, DMA_SIZE_32);
-	channel_config_set_read_increment(&dma_conf, false);
-	channel_config_set_write_increment(&dma_conf, true);
-	channel_config_set_ring(&dma_conf, GPIO_OUT, RX_BITS_DEPTH);
-	channel_config_set_dreq(&dma_conf, pio_get_dreq(PIO, SM_AD, false));
-	dma_channel_configure(dma_ch_in_cos, &dma_conf, rx_cos, &PIO->rxf[SM_AD], UINT_MAX, true);
-
-	multicore_launch_core1(rf_rx);
-
 	const uint8_t *block;
 
 	while (queue_try_remove(&iq_queue, &block))
 		/* Flush the queue */;
 
+	rf_rx_start();
+	sleep_us(100);
+
+	multicore_launch_core1(rf_rx);
+
 	while (true) {
 		int cmd;
 
@@ -704,16 +601,10 @@ static void do_rx()
 done:
 	multicore_fifo_push_blocking(0);
 	multicore_fifo_pop_blocking();
-	sleep_us(10);
+	sleep_us(100);
 	multicore_reset_core1();
 
 	rf_rx_stop();
-
-	dma_channel_clear_chain_to(dma_ch_in_cos);
-	dma_channel_abort(dma_ch_in_cos);
-	dma_channel_cleanup(dma_ch_in_cos);
-	dma_channel_unclaim(dma_ch_in_cos);
-	dma_ch_in_cos = -1;
 }
 
 int main()
@@ -728,6 +619,7 @@ int main()
 	gpio_set_dir(PSU_PIN, GPIO_OUT);
 	gpio_put(PSU_PIN, 1);
 
+	/* Prioritize DMA over CPU. */
 	bus_ctrl_hw->priority |= BUSCTRL_BUS_PRIORITY_DMA_W_BITS | BUSCTRL_BUS_PRIORITY_DMA_R_BITS;
 
 	stdio_usb_init();
@@ -735,8 +627,9 @@ int main()
 
 	queue_init(&iq_queue, sizeof(uint8_t *), IQ_QUEUE_LEN);
 
-	rx_lo_init(frequency + sample_rate);
+	rx_lo_init(frequency + sample_rate, true);
 
+	/* We need to have the sampling timer ready. */
 	dma_t_samp = dma_claim_unused_timer(true);
 	dma_timer_set_fraction(dma_t_samp, 1, CLK_SYS_HZ / (sample_rate * DECIMATE));
 

tools/clangd.py

@@ -1,50 +0,0 @@
-#!/usr/bin/env python
-
-import os.path
-import sys
-from glob import glob
-
-import click
-import yaml
-
-
-@click.command()
-def clangd():
-    """Generate .clangd file for local development."""
-
-    assert "PICO_SDK_PATH" in os.environ, "PICO_SDK_PATH not set"
-
-    pico_sdk_path = os.path.realpath(os.environ["PICO_SDK_PATH"])
-    cwd = os.path.realpath(os.getcwd())
-
-    includes = [
-        *glob(f"{pico_sdk_path}/src/common/*/include"),
-        *glob(f"{pico_sdk_path}/src/rp2040/*/include"),
-        *glob(f"{pico_sdk_path}/src/rp2_common/*/include"),
-        f"{pico_sdk_path}/lib/tinyusb/src",
-        *glob(f"{cwd}/src/**/include", recursive=True),
-        f"{cwd}/build/generated/pico_base",
-        f"{cwd}/build/sdk",
-    ]
-
-    flags = [
-        "-Wall",
-        "-Wextra",
-        "-xc",
-        "-DCFG_TUSB_MCU=OPT_MCU_RP2040",
-        "-I/usr/arm-none-eabi/include",
-    ]
-
-    yaml.safe_dump(
-        {
-            "CompileFlags": {
-                "Compiler": "arm-none-eabi-gcc",
-                "Add": [*flags, *[f"-I{inc}" for inc in includes]],
-            }
-        },
-        sys.stdout,
-    )
-
-
-if __name__ == "__main__":
-    clangd()